参数资料
型号: SI5338N-AXXXXXGM
厂商: SILICON LABORATORIES
元件分类: 时钟产生/分配
英文描述: 700 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC24
封装: 4 X 4 MM, ROHS COMPLIANT, MO-220VGGD-8, QFN-24
文件页数: 14/42页
文件大小: 380K
代理商: SI5338N-AXXXXXGM
Si5338
Rev. 1.0
21
Figure 9. I2C Programming Procedure
Confirm PLL lock status
NO
YES
NO
YES
Register
Map
Input clocks are
validated with the
LOS alarms. See
Register 218 to
determine which LOS
should be monitored
PLL is locked when
PLL_LOL, SYS_CAL, and
all other alarms are
cleared
Copy registers as follows:
237[1:0] to 47[1:0]
236[7:0] to 46[7:0]
235[7:0] to 45[7:0]
Set 47[7:2] = 000101b
Use ClockBuilder
Desktop v3.0 or later
Pause LOL
Set DIS_LOL = 1; reg241[7]
Write new configuration to device
accounting for the write-allowed mask
(See AN411)
Validate input clock status
Configure PLL for locking
Set FCAL_OVRD_EN = 0; reg49[7]
Initiate Locking of PLL
Set SOFT_RESET = 1; reg246[1]
Restart LOL
Set DIS_LOL = 0; reg241[7]
Set reg 241 = 0x65
Wait 25 ms
Copy FCAL values to
active registers
Set PLL to use FCAL values
Set FCAL_OVRD_EN = 1; reg49[7]
Is input clock valid?
Is PLL locked?
Disable Outputs
Set OEB_ALL = 1; reg230[4]
Enable Outputs
Set OEB_ALL = 0; reg230[4]
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