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参数资料
| 型号： | SI5338N-AXXXXXGM |
| 厂商： | SILICON LABORATORIES |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 700 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC24 |
| 封装： | 4 X 4 MM, ROHS COMPLIANT, MO-220VGGD-8, QFN-24 |
| 文件页数： | 16/42页 |
| 文件大小： | 380K |
| 代理商： | SI5338N-AXXXXXGM |
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Si5338
Rev. 1.0
23
Figure 12. Output Enable Pin (Si5338K/L/M)
3.7.2. Enabling Outputs through the I2C Interface
Output enable can be controlled through the I2C
interface. As shown in Figure 13, register 230[3:0]
allows control of each individual output driver. Register
230[4] controls all drivers at once. When register 230[4]
is set to disable all outputs, the individual output
enables will have no effect. Registers 110[7:6], 114[7:6],
118[7:6], and 112[7:6] control the output disabled state
as tri-state, low, high, or always on. If always on is set,
that output will always be on regardless of any other
register or chip state. In addition, the always on mode
must be selected for an output that is fed back in a Zero
Delay application.
Figure 13. Output Enable Control Registers
OEB
Control
NVM
(OTP)
Control & Memory
RAM
0 = Enabled
1 = Disabled
230
OEB
0
OEB
1
OEB
2
OEB
3
OEB
All
1
2
3
4
5
6
7
0 = enable
1 = disable
110
0
1
2
3
4
5
6
7
CLK0 OEB
State
114
0
1
2
3
4
5
6
7
CLK1 OEB
State
118
0
1
2
3
4
5
6
7
CLK2 OEB
State
122
0
1
2
3
4
5
6
7
CLK3 OEB
State
00 = disabled tri-state
01 = disabled low
10 = disabled high
11 = always enabled
Bits reserved
Bits used by other functions
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SI5338N-B01504-GM | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Bulk |
| SI5338N-B01504-GMR | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Tape and Reel |
| SI5338N-B01552-GM | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Bulk |
| SI5338N-B01552-GMR | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Tape and Reel |
| SI5338N-B01598-GM | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Bulk |
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