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参数资料
| 型号： | SME1430LGA-480 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 64-BIT, 480 MHz, RISC PROCESSOR, CBGA587 |
| 封装： | CERAMIC, LGA-587 |
| 文件页数： | 10/60页 |
| 文件大小： | 646K |
| 代理商： | SME1430LGA-480 |
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18
SME1430LGA-360
SME1430LGA-440
SME1430LGA-480
Highly Integrated 64-Bit RISC; L2-Cache, DRAM, PCI Interfaces
UltraSPARC-IIi CPU
May 1999
Sun Microsystems, Inc
JTAG/Debug Interface
Symbol
Volts
Type
Signal
Transitions
Aligned with:
Name and Function
TDI
3.3 V
I
Not aligned
IEEE 1149 test data input; pin internally pulled to logic 1 when not
driven
TCK
I
IEEE 1149 test clock input; pin must always be held at logic 1 or
logic 0 if not connected to a clock source
TMS
I
IEEE 1149 test mode select input; pin internally pulled to logic 1 if
not driven
TRST_L
I
IEEE 1149 test reset input (active low); pin internally pulled to
logic 1 if not driven
RAM_TEST
I
When asserted this pin forces the processor into SRAM test
mode allowing direct access to the cache SRAMs for memory
testing
ITB_TEST_MODE
I
Enables a special SRAM mode for testing the ITB megacell; pull
to ground using a 10.7 k
, 1% resistor
EXT_EVENT
I
Signal used to indicate that the clock should be stopped; debug
signal set inactive to logic 0 on production systems
SYNC_3TO1_MODE
I
SME1430 CPU only; selects PCI synchronizers to be operated at
3:1 (active high) or 2:1 mode (active low); two CPU cycles settling
time, or three CPU cycles settling time for synchronizers
TDO
1.9 V
O
Not aligned
IEEE 1149 test data output; tri-state signal driven only when the
TAP controller is in the shift-DR state
PMO
O
Used for on-chip process monitors; reserved for IC manufacturing
only
TEMP_SEN[1:0]
N/A
O
Denes scale end points of the processor temperature sense
element on the module; reserved for IC manufacturing only
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