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| 型号： | SST85LD1001T-60-RI-LBTE |
| 元件分类： | 存储控制器/管理单元 |
| 英文描述： | IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA91 |
| 封装： | 12 X 24 MM, ROHS COMPLIANT, MO-210, LBGA-91 |
| 文件页数： | 18/36页 |
| 文件大小： | 913K |
| 代理商： | SST85LD1001T-60-RI-LBTE |
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2009 Silicon Storage Technology, Inc.
S71382-04-000
10/09
25
512 MByte / 1 GByte / 2 GByte NANDrive
SST85LD0512 / SST85LD1001T / SST85LD1002U
Data Sheet
Features 01H and 81H are used to enable and clear 8-bit data transfer mode. If the 01H feature com-
mand is issued all data transfers will occur on the low order D7-D0 data bus and the IOCS16# signal
will not be asserted for data register accesses.
Features 02H and 82H allow the host to enable or disable write cache in the NANDrives that imple-
ment write cache. When the subcommand Disable-Write-Cache is issued, the NANDrive should ini-
tiate the sequence to flush cache to non-volatile memory before command completion.
Feature 03H allows the host to select the transfer mode by specifying a value in the Sector Count reg-
ister. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value. One
PIO mode is selected at all times. The host may change the selected modes by the Set-Features com-
mand.
Feature 55H is the default feature for the NANDrive. Therefore, the host does not have to issue Set-
Features command with this feature unless it is necessary for compatibility reasons.
Features 66H and CCH can be used to enable and disable whether the Power-on Reset (POR)
Defaults will be set when a software reset occurs.
Table 10: Features Supported
Feature
Operation
01H
Enable 8-bit data transfers.
02H
Enable Write cache
03H
Set transfer mode based on value in Sector Count register. Table 11 defines the values.
09H
Enable Extended Power Operations
55H
Disable Read Look Ahead.
66H
Disable Power-on Reset (POR) establishment of defaults at software reset.
69H
NOP - Accepted for backward compatibility.
81H
Disable 8-bit data transfer.
82H
Disable Write Cache
89H
Disable Extended Power operations
96H
NOP - Accepted for backward compatibility.
97H
Accepted for backward compatibility. Use of this Feature is not recommended.
AAH
Enable Read-Look-Ahead
CCH
Enable Power-on Reset (POR) establishment of defaults at software reset.
T10.0 1382
Table 11: Transfer Mode Values
Mode
Bits [7:3]
Bits [2:0]
PIO default mode
00000b
000b
PIO default mode, disable IORDY
00000b
001b
PIO flow control transfer mode
00001b
mode1
1. Mode = transfer mode number, all other values are not valid
Multi-word DMA mode
00100b
mode1
Ultra-DMA mode
01000b
mode1
Reserved
Other
N/A
T11.1 1382
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SST85LD1002L-60-4C-LBTE | 功能描述:闪存 2G NAND 60ns 3.3V Commercial RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST85LD1002L-60-PC-LBTE | 功能描述:闪存 2GB NAND 60ns 3.3V Commercial RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST85LD1002U-60-5I-LBTE | 功能描述:闪存 2G NAND 60ns 3.3V Industrial RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST85LD1002U-60-RI-LBTE | 功能描述:闪存 2GB NAND 60ns 3.3V Industrial RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST85LD1004M-60-4C-LBTE | 功能描述:闪存 4G NAND 60ns 3.3V Commercial RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
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