参数资料
型号: ST72141K2B3/XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32
封装: 0.400 INCH, PLASTIC, SDIP-32
文件页数: 58/133页
文件大小: 2615K
代理商: ST72141K2B3/XXX
Obsolete
Product(s)
- Obsolete
Product(s)
ST72141K2
30/133
POWER SAVING MODES (Cont’d)
5.3 WAIT Mode
WAIT mode places the MCU in a low power con-
sumption mode by stopping the CPU.
This power saving mode is selected by calling the
“WFI” ST7 software instruction.
All peripherals remain active. During WAIT mode,
the I bit of the CC register are forced to 0, to ena-
ble all interrupts. All other registers and memory
remain unchanged. The MCU remains in WAIT
mode until an interrupt or Reset occurs, whereup-
on the Program Counter branches to the starting
address of the interrupt or Reset service routine.
The MCU will remain in WAIT mode until a Reset
or an Interrupt occurs, causing it to wake up.
Refer to Figure 22.
5.4 SLOW Mode
This mode has two targets:
– To reduce power consumption by decreasing the
internal clock in the device,
– To adapt the internal clock frequency (fCPU) to
the available supply voltage.
SLOW mode is controlled by the SMS bit in the
MISCR register. This bit enables or disables Slow
mode selecting the internal slow frequency (fCPU).
In this mode, the oscillator frequency can be divid-
ed by 32 instead of 2 in normal operating mode.
The CPU and peripherals are clocked at this lower
frequency except the Motor Control and the SPI
peripherals which have their own clock selection
bit (XT16) in the MISCR register.
Figure 22. WAIT mode flow-chart
WFI INSTRUCTION
RESET
INTERRUPT
Y
N
Y
CPU
OSCILLATOR
PERIPHERALS
I BIT
ON
0
OFF
if exit caused by a RESET, a 4096 CPU
clock cycle delay is inserted.
CPU
OSCILLATOR
PERIPHERALS
ON
OFF*
OFF
Note:
* The peripheral clock is stopped only when exit caused by RESET and not by an interrupt.
** Before servicing an interrupt, the CC register is pushed on the stack.
FETCH RESET VECTOR
OR SERVICE INTERRUPT**
CPU
OSCILLATOR
PERIPHERALS
ON
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