参数资料
型号: ST72F651AR6T1
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, MICROCONTROLLER, PQFP64
封装: 10 X 10 MM, ROHS COMPLIANT, TQFP-64
文件页数: 69/161页
文件大小: 2656K
代理商: ST72F651AR6T1
ST72651AR6
160/161
Doc ID 7215 Rev 4
17 SUMMARY OF CHANGES
Date
Revision
Main changes
10-Sep-2006
3.0
Added “related documentation” section in specific chapters thoughout document
Added a note in section 6.3 on page 30. Changed interrupt generated in the SPICR register”
in description of OVR and MODF bits in section 11.6.8 on page 102.
Updated note in AF bit description (SR2 register) in section 11.7.7 on page 110. Changed
Added reference to AN1635 in section 15.2 on page 154.Notes related to Multimaster mode,
Watchdog hardware in ICC mode and “Unexpected Reset Fetch” added to Important Notes,
section 16 on page 159. Figure 85, Figure 86 added do show schematics of external reset
for LVD on and off. “OPTION LIST” on page 155 updated. VDDA text updated in LVD de-
scription, section 6.3 on page 30. DTC Frequency text added for USB and Standalone
modes, section 6.4.2 on page 31. Updated description of the USB Voltage Detector Enable
bit in section 6.4.4 on page 36.Note added regarding DTC frequency for CP[1:0] bits de-
scription, section 10 on page 52.Added note related to PD7 pin, section 13.2.2 on page 125
Updated descriptions of Flash Readout protection, Section 4.4, Section 15.1. Reference
made to the Flash Programming Reference Manual for Flash timing values and data reten-
tion increased to 40 years, section 13.6.2 on page 132. ADC conversion description updat-
ed, related to the CSR register bits, section 11.8.3.4 on page 115 and section 11.8.6 on page
Option bit description for PSMOD updated, section 15.1 on page 153. Max values for supply
current in HALT mode added, section 13.4.3 on page 130. Thermal Characteristics added,
section 14.2 on page 152. Description modified for USBVDD pin in Table 1 on page 9
Added caution related to VDDF powered I/Os, section 6.4.2.2 on page 33. Added important
Description of PLG bit modified, section 6.4.4 on page 36. HALT mode exit triggers modified
in section 8.3 on page 44. New section added related to VDDF-powered I/Os, section 9.2.4
on page 46. Note altered for Table 12 on page 47. USBVIT+/- parameter wording modified
in section 13.3.3 on page 127. Note 2 modified related to the protection diode in section
13.3.3 on page 127. Reference to Note 6 changed to Note 3, Figure 85 on page 140. Figure
Updated Option List. Application example figures removed in section 6.4.3 on page 35. De-
scriptions for bits 4 and 5 in PCR register modifed for “rising/falling edge”, section 6.4.4 on
Updated final paragraph of section 9.2.1 on page 45. References to 5V changed to VDDF,
Figure 56 on page 95 and Figure 61Additional note for USB cable unplug detection added,
External interrupt text added, section 9.2.1 on page 45. Development Tools, section 15.3 on
page 155, updated. External power supply switch figure updated with new recommendation
for PMOS, Figure 23 on page 32. TQFP packages renamed LQFP (Low profile Quad Flat).
Removed SO34 package from document. ESD value modified, section 13.7.3.1 on page
134. VFESD, VFFTB and EMI values updated in section 13.7 on page 133
11-Jun-2009
4
Updated part numbers on cover page. Removed ROM and FASTROM versions in the whole
document, together with 2.7 to 5.5 V voltage range, and LQFP48 package. Removed option
list.
Replaced CCR by CC (Condition Code) register when the I bit is concerned.
Added caution note in Section 6.2 RESET SEQUENCE MANAGER (RSM). Removed EMC
Corrected CPHA value in Figure 89 on page 144. Updated tv(MO) and tH(MO) in Figure 90 on
tivity). Replaced soldering information with ECOPACK reference in Section 14 PACKAGE
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