参数资料
型号: ST72F651AR6T1
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, MICROCONTROLLER, PQFP64
封装: 10 X 10 MM, ROHS COMPLIANT, TQFP-64
文件页数: 98/161页
文件大小: 2656K
代理商: ST72F651AR6T1
ST72651AR6
41/161
Doc ID 7215 Rev 4
INTERRUPTS (Cont’d)
Table 9. Dedicated Interrupt Instruction Set
Note: During the execution of an interrupt routine, the HALT, POPCC, RIM, SIM and WFI instructions
change the current software priority up to the next IRET instruction or one of the previously mentioned
instructions.
In order not to lose the current software priority level, the RIM, SIM, HALT, WFI and POP CC instructions
should never be used in an interrupt routine.
Table 10. Interrupt Mapping
Instruction
New Description
Function/Example
I1
H
I0
N
Z
C
HALT
Entering Halt mode
1
0
IRET
Interrupt routine return
Pop CC, A, X, PC
I1
H
I0
N
Z
C
JRM
Jump if I1:0=11
I1:0=11 ?
JRNM
Jump if I1:0<>11
I1:0<>11 ?
POP CC
Pop CC from the Stack
Mem => CC
I1
H
I0
N
Z
C
RIM
Enable interrupt (level 0 set)
Load 10 in I1:0 of CC
1
0
SIM
Disable interrupt (level 3 set)
Load 11 in I1:0 of CC
1
TRAP
Software trap
Software NMI
1
WFI
Wait for interrupt
1
0
Source
Block
Description
Register
Label
Priority
Order
Exit
from
HALT
Address
Vector
RESET
Reset
N/A
Highest
Priority
Lowest
Priority
yes
FFFEh-FFFFh
TRAP
Software Interrupt
no
FFFCh-FFFDh
0
ICP
Flash Start Programming NMI Interrupt (TLI)
yes
FFFAh-FFFBh
1
PLG
Power Management USB Plug/Unplug
PCR
yes
FFF8h-FFF9h
2
EI0
External Interrupt Port A
N/A
yes
FFF6h-FFF7h
3
DTC
DTC Peripheral Interrupt
DTCSR
no
FFF4h-FFF5h
4
USB
USB Peripheral Interrupt
USBISTR
no
FFF2h-FFF3h
5
ESUSP
USB End Suspend Interrupt
USBISTR
yes
FFF0h-FFF1h
6
EI1
External Interrupt Port D
N/A
yes
FFEEh-FFEFh
7I2CI2C Interrupt
I2CSRx
no
FFECh-FFEDh
8
TIM
Timer interrupt
TSR
no
FFEAh-FFEBh
9
EI2
External Interrupt Port C
N/A
yes
FFE8h-FFE9h
10
SPI
SPI interrupt
SPICSR
yes
FFE6h-FFE7h
1
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