- 您现在的位置：买卖IC网 > PDF目录195890 > ST72T734J6B1 (意法半导体) 8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM, ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2C PDF资料下载
参数资料
| 型号： | ST72T734J6B1 |
| 厂商： | 意法半导体 |
| 元件分类： | ADC |
| 英文描述： | 8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM, ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2C |
| 中文描述： | 8位USB单片机的显示器，高达60K章检察官办公室，每1000内存，模数转换器，定时器，同步，材质单元，脉宽调制/的BRM，的H / W DDC的 |
| 文件页数： | 83/144页 |
| 文件大小： | 1280K |
| 代理商： | ST72T734J6B1 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页当前第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页
ST72774/ST727754/ST72734
43/144
16-BIT TIMER (Cont’d)
16-bit read sequence: (from either the Counter
Register or the Alternate Counter Register).
The user must read the MSB first, then the LSB
value is buffered automatically.
This buffered value remains unchanged until the
16-bit read sequence is completed, even if the
user reads the MSB several times.
After a complete reading sequence, if only the CLR
register or ACLR register are read, they return the
LSB of the count value at the time of the read.
An overflow occurs when the counter rolls over
from FFFFh to 0000h then:
– The TOF bit of the SR register is set.
– A timer interrupt is generated if:
– TOIE bit of the CR1register is set and
– I bit of the CC register is cleared.
If one of these conditions is false, the interrupt
remains pending to be issued as soon as they are
both true.
Clearing the overflow interrupt request is done by:
1. Reading the SR register while the TOF bit is
set.
2. An access (read or write) to the CLR register.
Notes: The TOF bit is not cleared by accesses to
ACLR register. This feature allows simultaneous
use of the overflow function and reads of the free
running counter at random times (for example, to
measure elapsed time) without the risk of clearing
the TOF bit erroneously.
The timer is not affected by WAIT mode.
4.3.3.2 External Clock
The external clock (where available) is selected if
CC0=1 and CC1=1 in CR2 register.
The status of the EXEDG bit determines the type
of level transition on the external clock pin
EXTCLK that will trigger the free running counter.
The counter is synchronised with the falling edge
of the internal CPU clock.
At least four falling edges of the CPU clock must
occur between two consecutive active edges of
the
external
clock; thus
the
external
clock
frequency must be less than a quarter of the CPU
clock frequency.
LSB is buffered
Read MSB
At t0
Read LSB
Returns the buffered
LSB value at t0
At t0 +Dt
Other
instructions
Beginning of the sequence
Sequence completed
相关PDF资料 |
PDF描述 |
|---|---|
| ST72T754J9B1 | 8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM, ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2C |
| ST72T754S9T1 | 8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM, ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2C |
| ST733C08LFK2 | 1900 A, 800 V, SCR, TO-200AC |
| ST733C08LFK1L | 1900 A, 800 V, SCR, TO-200AC |
| ST733C04LEK1 | 1900 A, 400 V, SCR, TO-200AC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ST72T754J9B1 | 制造商:STMicroelectronics 功能描述: |
| ST72T774J9B1 | 制造商:STMicroelectronics 功能描述: |
| ST72T774S9T1 | 制造商:STMicroelectronics 功能描述:ST72T774S9T1 - Trays |
| ST730 | 制造商:IRF 制造商全称:International Rectifier 功能描述:PHASE CONTROL THYRISTORS Hockey Puk Version |
| ST7-30 | 制造商:SUPERWORLD 制造商全称:Superworld Electronics 功能描述:POWER TRANSFORMER |
发布紧急采购，3分钟左右您将得到回复。