- 您现在的位置：买卖IC网 > PDF目录69378 > ST7FSCR1E4U1 (STMICROELECTRONICS) 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, QCC64 PDF资料下载
参数资料
| 型号： | ST7FSCR1E4U1 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, QCC64 |
| 封装： | QFN-64 |
| 文件页数： | 45/101页 |
| 文件大小： | 4506K |
| 代理商： | ST7FSCR1E4U1 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页当前第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页
ST7SCR1E4 ST7SCR1R4
48/101
USB INTERFACE (Cont’d)
12.3.4 Register Description
INTERRUPT STATUS REGISTER (USBISTR)
Read/Write
Reset Value: 0000 0000 (00h)
These bits cannot be set by software. When an in-
terrupt occurs these bits are set by hardware. Soft-
ware must read them to determine the interrupt
type and clear them after servicing.
Note: The CTR bit (which is an OR of all the end-
point CTR flags) cannot be cleared directly, only
by clearing the CTR flags in the Endpoint regis-
ters.
Bit 7 = CTR Correct Transfer.
This bit is set by hardware when a correct transfer
operation is performed. This bit is an OR of all
CTR flags (CTR0 in the EP0R register and
CTR_RX and CTR_TX in the EPnRXR and EP-
nTXR registers). By looking in the USBSR regis-
ter, the type of transfer can be determined from the
PID[1:0] bits for Endpoint 0. For the other End-
points, the Endpoint number on which the transfer
was made is identified by the EP[1:0] bits and the
type of transfer by the IN/OUT bit.
0: No Correct Transfer detected
1: Correct Transfer detected
Note: A transfer where the device sent a NAK or
STALL handshake is considered not correct (the
host only sends ACK handshakes). A transfer is
considered correct if there are no errors in the PID
and CRC fields, if the DATA0/DATA1 PID is sent
as expected, if there were no data overruns, bit
stuffing or framing errors.
Bit 6 = Reserved, forced by hardware to 0.
Bit 5 = SOVR Setup Overrun.
This bit is set by hardware when a correct Setup
transfer operation is performed while the software
is servicing an interrupt which occured on the
same Endpoint (CTR0 bit in the EP0R register is
still set when SETUP correct transfer occurs).
0: No SETUP overrun detected
1: SETUP overrun detected
When this event occurs, the USBSR register is not
updated because the only source of the SOVR
event is the SETUP token reception on the Control
Endpoint (EP0).
Bit 4 = ERR Error.
This bit is set by hardware whenever one of the er-
rors listed below has occurred:
0: No error detected
1: Timeout, CRC, bit stuffing, nonstandard
framing or buffer overrun error detected
Note: Refer to the ERR[2:0] bits in the USBSR
register to determine the error type.
Bit 3 = SUSP Suspend mode request.
This bit is set by hardware when a constant idle
state is present on the bus line for more than 3 ms,
indicating a suspend mode request from the USB.
The suspend request check is active immediately
after each USB reset event and is disabled by
hardware when suspend mode is forced (FSUSP
bit in the USBCTLR register) until the end of
resume sequence.
Bit 2 = ESUSP End Suspend mode.
This bit is set by hardware when, during suspend
mode, activity is detected that wakes the USB in-
terface up from suspend mode.
This interrupt is serviced by a specific vector, in or-
der to wake up the ST7 from HALT mode.
0: No End Suspend detected
1: End Suspend detected
Bit 1 = RESET USB reset.
This bit is set by hardware when the USB reset se-
quence is detected on the bus.
0: No USB reset signal detected
1: USB reset signal detected
Note: The DADDR, EP0R, EP1RXR, EP1TXR,
EP2RXR and EP2TXR registers are reset by a
USB reset.
Bit 0 = SOF Start of frame.
This bit is set by hardware when a SOF token is re-
ceived on the USB.
0: No SOF received
1: SOF received
Note: To avoid spurious clearing of some bits, it is
recommended to clear them using a load instruc-
tion where all bits which must not be altered are
set, and all bits to be cleared are reset. Avoid read-
modify-write instructions like AND, XOR...
7
0
CTR
0
SOVR ERROR SUSP ESUSP RESET SOF
相关PDF资料 |
PDF描述 |
|---|---|
| ST7SCR1T1/XXX | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64 |
| ST7SCR1E4U1/XXX | MICROCONTROLLER, QCC24 |
| ST7SCR1E4M1/XXX | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO24 |
| ST7L34F2MCRE/XXX | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO20 |
| ST7L35F2MARE/XXX | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ST7FSCR1R4 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8-BIT LOW-POWER, FULL-SPEED USB MCU WITH 16K FLASH, 768 RAM, SMARTCARD I/F, TIMER |
| ST7FSCR1R4T1 | 功能描述:8位微控制器 -MCU 8-BIT Lw Pwr USB MCU W/ 16K FLASH RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| ST7FUS-PRIMER | 功能描述:程序设计器 - 基于处理器 Low-Cost Eval Dev Tool Pack RoHS:否 制造商:Olimex Ltd. 产品:Programmers 工具用于评估:XMEGA, MegaAVR, tinyAVR 核心:AVR 接口类型:USB 工作电源电压:1.8 V to 5.5 V |
| ST7FUS-SK/RAIS | 制造商:STMicroelectronics 功能描述:Evaluation and Application Development with ST7Ultralite |
| ST7GEME4 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Full-speed USB MCU with smartcard firmware and EMV/non-EMV interface |
发布紧急采购，3分钟左右您将得到回复。