参数资料
型号: ST7FSCR1E4U1
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, QCC64
封装: QFN-64
文件页数: 48/101页
文件大小: 4506K
代理商: ST7FSCR1E4U1
ST7SCR1E4 ST7SCR1R4
50/101
USB INTERFACE (Cont’d)
DEVICE ADDRESS REGISTER (DADDR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7 = Reserved, forced by hardware to 0.
Bits 6:0 = ADD[6:0] Device address, 7 bits.
Software must write into this register the address
sent by the host during enumeration.
Note: This register is also reset when a USB reset
is received or forced through bit FRES in the US-
BCTLR register.
USB STATUS REGISTER (USBSR)
Read only
Reset Value: 0000 0000 (00h)
Bits 7:6 = PID[1:0] Token PID bits 1 & 0 for End-
point 0 Control.
USB token PIDs are encoded in four bits. PID[1:0]
correspond to the most significant bits of the PID
field of the last token PID received by Endpoint 0.
Note: The least significant PID bits have a fixed
value of 01.
When a CTR interrupt occurs on Endpoint 0 (see
register USBISTR) the software should read the
PID[1:0] bits to retrieve the PID name of the token
received.
The USB specification defines PID bits as:
Bit 5 = IN/OUT Last transaction direction for End-
point 1, 2 , 3, 4 or 5.
This bit is set by hardware when a CTR interrupt
occurs on Endpoint 1, 2, 3, 4 or 5.
0: OUT transaction
1: IN transaction
Bits 4:3 = Reserved, forced by hardware to 0.
Bits 2:0 = EP[2:0] Endpoint number.
These bits identify the endpoint which required at-
tention.
000 = Endpoint 0
001 = Endpoint 1
010 = Endpoint 2
011 = Endpoint 3
100 = Endpoint 4
101 = Endpoint 5
ERROR STATUS REGISTER (ERRSR)
Read only
Reset Value: 0000 0000 (00h)
Bits 7:3 = Reserved, forced by hardware to 0.
Bits 2:0 = ERR[2:0] Error type.
These bits identify the type of error which oc-
curred.
Note: these bits are set by hardware when an er-
ror interrupt occurs and are reset automatically
when the error bit (USBISTR bit 4) is cleared by
software.
7
0
ADD6
ADD5
ADD4
ADD3
ADD2
ADD1
ADD0
7
0
PID1
PID0
IN/
OUT
0
EP2
EP1
EP0
PID1
PID0
PID Name
0
OUT
1
0
IN
1
SETUP
7
0
ERR2
ERR1
ERR0
ERR2 ERR1 ERR0
Meaning
0
No error
0
1
Bitstuffing error
0
1
0
CRC error
0
1
EOP error (unexpected end of
packet or SE0 not followed by
J-state)
1
0
PID error (PID encoding error,
unexpected or unknown PID)
1
0
1
Memory over / underrun (mem-
ory controller has not an-
swered in time to a memory
data request)
1
Other error (wrong packet, tim-
eout error)
相关PDF资料
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