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参数资料
| 型号： | ST7FSCR1E4U1 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, QCC64 |
| 封装： | QFN-64 |
| 文件页数： | 63/101页 |
| 文件大小： | 4506K |
| 代理商： | ST7FSCR1E4U1 |
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ST7SCR1E4 ST7SCR1R4
64/101
SMARTCARD INTERFACE (Cont’d)
12.4.4 Register Description
SMARTCARD INTERFACE CONTROL REGIS-
TER (CRDCR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7 = CRDRST Smartcard Interface Reset.
This bit is set by software to reset the UART of the
Smartcard interface.
0: No Smartcard UART Reset
1: Smartcard UART Reset
Bit 6 = CRDDET Card Presence Detector.
This bit is set and cleared by software to configure
the card presence detector switch.
0: Switch open if no card is present
1: Switch closed if no card is present
Bits [5:4] = VCARD[1:0] Card voltage selection.
These bits select the card voltage.
Bit 3 = UART UART Mode Selection.
This bit is set and cleared by software to select
UART or manual mode.
0: CRDIO pin is a copy of the CRDIO bit in the
CRDCCR register (Manual mode).
1: CRDIO pin is the output of the smartcard UART
(UART mode).
Caution: Before switching from Manual mode to
UART mode, software must set the CRDIO bit in
the CRDCCR register.
Bit 2 = WTEN Waiting Time Counter enable.
0: Waiting Time counter stopped. While WTEN =
0, a write access to the CRDWT2 register loads
the Waiting time counter with the load value held
in the CRDWT0, CRDWT1 and CRDWT2 regis-
ters.
1: Start counter. In UART mode, the counter is au-
tomatically reloaded on start bit detection.
Bit 1 = CREP Automatic character repetition in
case of parity error.
0: In reception mode: no parity error signal indica-
tion (no retry on parity error).
In transmission mode: no error signal process-
ing. No retransmission of a refused character on
parity error.
1: Automatic parity management:
In transmission mode: up to 4 character repeti-
tions on parity error.
In reception mode: up to 4 retries are made on
parity error.
The PARF parity error flag is set by hardware if a
parity error is detected.
If the transmitted character is refused, the PARF
bit is set (but the TXCF bit is reset) and an interrupt
is generated if the PARM bit is set.
Note: If CREP=1, the PARF flag is set at the 5th
error (after 4 character repetitions or 4 retries).
If CREP=0, the PARF bit is set after the first parity
error.
Bit 0 = CONV ISO convention selection.
0: Direct convention, the B0 bit (LSB) is sent first, a
’1’ is a level 1 on the Card I/O pin, the parity bit is
added after the B7 bit.
1: Inverse convention, the B7 bit (MSB) is sent
first, a ’1’ is a level 0 on Card I/O pin, the parity
bit is added after the B0 bit.
Note: To detect the convention used by any card,
apply the following rule. If a card uses the conven-
tion selected by the reader, an RXC event occurs
at answer to reset. Otherwise a parity error also
occurs.
7
0
CRD
RST
CRD
DET
VCAR
D 1
VCAR
D 0
U
ART
WT
EN
C
REP
CO
NV
Bit 1
Bit 0
Vcard
0
0V
0
1
1.8V
1
0
3V
1
5V
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