参数资料
型号: ST7PL38F2MC/XXXE
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO20
封装: 0.300 INCH, ROHS COMPLIANT, PLASTIC, SOP-20
文件页数: 80/168页
文件大小: 2955K
代理商: ST7PL38F2MC/XXXE
Obsolete
Product(s)
- Obsolete
Product(s)
ST7L34, ST7L35, ST7L38, ST7L39
19/168
DATA EEPROM (cont’d)
5.4 POWER SAVING MODES
Wait mode
The data EEPROM can enter WAIT mode on exe-
cution of the WFI instruction of the microcontroller
or when the microcontroller enters ACTIVE HALT
mode.The data EEPROM will immediately enter
this mode if there is no programming in progress,
otherwise the data EEPROM will finish the cycle
and then enter WAIT mode.
Active Halt mode
Refer to Wait mode.
Halt mode
The data EEPROM immediately enters HALT
mode if the microcontroller executes the HALT in-
struction. Therefore the EEPROM will stop the
function in progress and data may be corrupted.
5.5 ACCESS ERROR HANDLING
If a read access occurs while E2LAT = 1, then the
data bus will not be driven.
If a write access occurs while E2LAT = 0, then the
data on the bus will not be latched.
If a programming cycle is interrupted (by RESET
action), the integrity of the data in memory is not
guaranteed.
5.6 DATA EEPROM READOUT PROTECTION
The readout protection is enabled through an op-
When this option is selected, the programs and
data stored in the EEPROM memory are protected
against readout (including a rewrite protection). In
Flash devices, when this protection is removed by
reprogramming the Option Byte, the entire Pro-
gram memory and EEPROM is first automatically
erased.
Note: Both Program Memory and data EEPROM
are protected using the same option bit.
Figure 9. Data EEPROM Programming Cycle
LAT
ERASE CYCLE
WRITE CYCLE
PGM
tPROG
READ OPERATION NOT POSSIBLE
WRITE OF
DATA LATCHES
READ OPERATION POSSIBLE
INTERNAL
PROGRAMMING
VOLTAGE
1
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