参数资料
型号: TMS320C2812ZHHS
厂商: TEXAS INSTRUMENTS INC
元件分类: 数字信号处理
英文描述: 16-BIT, 150 MHz, OTHER DSP, PBGA179
封装: LEAD FREE, BGA-179
文件页数: 19/156页
文件大小: 1826K
代理商: TMS320C2812ZHHS
Electrical Specifications
115
April 2001 Revised October 2005
SPRS174M
6.19
General-Purpose Input/Output (GPIO) Input Timing
GPIO
Signal
1
Sampling Window
Output From
Qualifier
1
0
SYSCLKOUT
QUALPRD = 1
(SYSCLKOUT/2)
NOTES: A. This glitch is ignored by the input qualifier. The QUALPRD bit field specifies the qualification sampling period. It can vary from
00 to 0xFF. Input qualification is not applicable when QUALPRD = 00. For any other value “n”, the qualification sampling period
in 2n SYSCLKOUT cycles (i.e., at every 2n SYSCLKOUT cycle, the GPIO pin will be sampled). Six consecutive samples must
be of the same value for a given input to be recognized.
B. For the qualifier to detect the change, the input must be stable for 10 SYSCLKOUT cycles or greater. In other words, the inputs
should be stable for (5
× QUALPRD × 2) SYSCLKOUT cycles. This would enable five sampling periods for detection to occur.
Since external signals are driven asynchronously, a 13-SYSCLKOUT-wide pulse provides reliable recognition.
See Note A
Sampling period, determined by GPxQUAL
[QUALPRD]
(SYSCLKOUT cycle
y 2 y QUALPRD) y 5
Figure 623. GPIO Input Qualifier Example Diagram for QUALPRD = 1
Table 623. General-Purpose Input Timing Requirements
MIN
MAX
UNIT
tw(GPI)
Pulse duration, GPIO low/high
All GPIOs
With no qualifier
2tc(SCO)
cycles
tw(GPI)
Pulse duration, GPIO low/high
All GPIOs
With qualifier
1tc(SCO) + IQT
cycles
Input Qualification Time (IQT) = [tc(SCO) × 2 × QUALPRD] × 5 + [tc(SCO) × 2 × QUALPRD].
GPIOxn
XCLKOUT
tw(GPI)
Figure 624. General-Purpose Input Timing
NOTE:
The pulse width requirement for general-purpose input is applicable for the XBIO and ADCSOC
pins as well.
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