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参数资料
型号： TMS320C2812ZHHS
厂商： TEXAS INSTRUMENTS INC
元件分类： 数字信号处理
英文描述： 16-BIT, 150 MHz, OTHER DSP, PBGA179
封装： LEAD FREE, BGA-179
文件页数： 99/156页
文件大小： 1826K
代理商： TMS320C2812ZHHS
Functional Overview
47
April 2001 Revised October 2005
SPRS174M
INT12
MUX
INT11
INT2
INT1
CPU
(Enable)
(Flag)
INTx
INTx.8
PIEIERx(8:1)
PIEIFRx(8:1)
MUX
INTx.7
INTx.6
INTx.5
INTx.4
INTx.3
INTx.2
INTx.1
From
Peripherals or
External
Interrupts
(Enable)
(Flag)
IER(12:1)
IFR(12:1)
Global
Enable
INTM
1
0
PIEACKx
(Enable/Flag)
Figure 37. Multiplexing of Interrupts Using the PIE Block
Table 311. PIE Peripheral Interrupts
CPU
PIE INTERRUPTS
CPU
INTERRUPTS
INTx.8
INTx.7
INTx.6
INTx.5
INTx.4
INTx.3
INTx.2
INTx.1
INT1
WAKEINT
(LPM/WD)
TINT0
(TIMER 0)
ADCINT
(ADC)
XINT2
XINT1
Reserved
PDPINTB
(EV-B)
PDPINTA
(EV-A)
INT2
Reserved
T1OFINT
(EV-A)
T1UFINT
(EV-A)
T1CINT
(EV-A)
T1PINT
(EV-A)
CMP3INT
(EV-A)
CMP2INT
(EV-A)
CMP1INT
(EV-A)
INT3
Reserved
CAPINT3
(EV-A)
CAPINT2
(EV-A)
CAPINT1
(EV-A)
T2OFINT
(EV-A)
T2UFINT
(EV-A)
T2CINT
(EV-A)
T2PINT
(EV-A)
INT4
Reserved
T3OFINT
(EV-B)
T3UFINT
(EV-B)
T3CINT
(EV-B)
T3PINT
(EV-B)
CMP6INT
(EV-B)
CMP5INT
(EV-B)
CMP4INT
(EV-B)
INT5
Reserved
CAPINT6
(EV-B)
CAPINT5
(EV-B)
CAPINT4
(EV-B)
T4OFINT
(EV-B)
T4UFINT
(EV-B)
T4CINT
(EV-B)
T4PINT
(EV-B)
INT6
Reserved
MXINT
(McBSP)
MRINT
(McBSP)
Reserved
SPITXINTA
(SPI)
SPIRXINTA
(SPI)
INT7
Reserved
INT8
Reserved
INT9
Reserved
ECAN1INT
(CAN)
ECAN0INT
(CAN)
SCITXINTB
(SCI-B)
SCIRXINTB
(SCI-B)
SCITXINTA
(SCI-A)
SCIRXINTA
(SCI-A)
INT10
Reserved
INT11
Reserved
INT12
Reserved
Out of the 96 possible interrupts, 45 interrupts are currently used. The remaining interrupts are reserved for future devices. These interrupts
can be used as software interrupts if they are enabled at the PIEIFRx level, provided none of the interrupts within the group is being used by
a peripheral. Otherwise, interrupts coming in from peripherals may be lost by accidentally clearing their flag while modifying the PIEIFR.
To summarize, there are two safe cases when the reserved interrupts could be used as software interrupts:
1) No peripheral within the group is asserting interrupts.
2) No peripheral interrupts are assigned to the group (example PIE group 12).
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