参数资料
型号: TMX320LF2403AVFS
厂商: Texas Instruments, Inc.
元件分类: 数字信号处理
英文描述: DSP CONTROLLERS
中文描述: DSP控制器
文件页数: 46/134页
文件大小: 1759K
代理商: TMX320LF2403AVFS
TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A
TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A
DSP CONTROLLERS
SPRS145K JULY 2000 REVISED AUGUST 2005
19
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
pin functions (continued)
Table 2. LF240xA and LC240xA Pin List and Package Options (Continued)
PIN NAME
LF2407A
(144-PGE)
2406A
(100-PZ)
LC2404A
(100-PZ)
2403A,
LC2402A
(64-PAG)
and
2402A
(64-PG)
DESCRIPTION
ADDRESS, DATA, AND MEMORY CONTROL SIGNALS (CONTINUED)
A12
43
Bit 12 of the 16-bit address bus
A13
39
Bit 13 of the 16-bit address bus
A14
34
Bit 14 of the 16-bit address bus
A15
31
Bit 15 of the 16-bit address bus
D0
127
Bit 0 of 16-bit data bus (
↑)
D1
130
Bit 1 of 16-bit data bus (
↑)
D2
132
Bit 2 of 16-bit data bus (
↑)
D3
134
Bit 3 of 16-bit data bus (
↑)
D4
136
Bit 4 of 16-bit data bus (
↑)
D5
138
Bit 5 of 16-bit data bus (
↑)
D6
143
Bit 6 of 16-bit data bus (
↑)
D7
5
Bit 7 of 16-bit data bus (
↑)
D8
9
Bit 8 of 16-bit data bus (
↑)
D9
13
Bit 9 of 16-bit data bus (
↑)
D10
15
Bit 10 of 16-bit data bus (
↑)
D11
17
Bit 11 of 16-bit data bus (
↑)
D12
20
Bit 12 of 16-bit data bus (
↑)
D13
22
Bit 13 of 16-bit data bus (
↑)
D14
24
Bit 14 of 16-bit data bus (
↑)
D15
27
Bit 15 of 16-bit data bus (
↑)
POWER SUPPLY
29
20
6
V
#
50
35
27
Core supply 3 3 V Digital logic supply voltage
VDD#
86
59
56
Core supply +3.3 V. Digital logic supply voltage.
129
91
4
10
42
30
35
V
#
67
47
52
I/O buffer supply +3.3 V. Digital logic and buffer supply
VDDO#
77
54
I/O buffer supply +3.3 V. Digital logic and buffer supply
voltage.
95
64
141
98
Bold, italicized pin names indicate pin function after reset.
GPIO General-purpose input/output pin. All GPIOs come up as input after reset.
§ It is highly recommended that VCCA be isolated from the digital supply voltage (and VSSA from digital ground) to maintain the specified accuracy
and improve the noise immunity of the ADC.
Only when all of the following conditions are met: EMU1/OFF is low, TRST is low, and EMU0 is high
# No power supply pin (VDD, VDDO, VSS, or VSSO) should be left unconnected. All power supply pins must be connected appropriately for proper
device operation.
LEGEND:
↑ Internal pullup
↓ Internal pulldown
(Typical active pullup/pulldown value is
±16 A.)
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