TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A
TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A
DSP CONTROLLERS
SPRS145K JULY 2000 REVISED AUGUST 2005
61
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
digital I/O and shared pin functions (continued)
D Output Control Registers — used to control the multiplexer selection that chooses between the primary
function of a pin or the general-purpose I/O function.
D Data and Control Registers — used to control the data and data direction of bidirectional I/O pins.
description of shared I/O pins
The control structure for shared I/O pins is shown in Figure 18, where each pin has three bits that define its
operation:
D MUX control bit — this bit selects between the primary function (1) and I/O function (0) of the pin.
D I/O direction bit — if the I/O function is selected for the pin (MUX control bit is set to 0), this bit determines
whether the pin is an input (0) or an output (1).
D I/O data bit — if the I/O function is selected for the pin (MUX control bit is set to 0) and the direction selected
is an input, data is read from this bit; if the direction selected is an output, data is written to this bit.
The MUX control bit, I/O direction bit, and I/O data bit are in the I/O control registers.
Pin
(Read/Write)
IOP Data Bit
In
Out
0 = Input
1 = Output
01
MUX Control Bit
0 = I/O Function
1 = Primary Function
IOP DIR Bit
Primary
Function
or I/O Pin
Pullup
or
Pulldown
(Internal)
Primary
Function
(Output Section)
Primary
Function
(Input Section)
Figure 18. Shared Pin Configuration
A summary of shared pin configurations and associated bits is shown in Table 12.