参数资料
| 型号： | W947D6HBHX5E |
| 厂商： | Winbond Electronics |
| 文件页数： | 15/60页 |
| 文件大小： | 0K |
| 描述： | IC LPDDR SDRAM 128MBIT 60VFBGA |
| 标准包装： | 312 |
| 格式 - 存储器： | RAM |
| 存储器类型： | 移动 LPDDR SDRAM |
| 存储容量： | 128M（8Mx16） |
| 速度： | 200MHz |
| 接口： | 并联 |
| 电源电压： | 1.7 V ~ 1.95 V |
| 工作温度： | -25°C ~ 85°C |
| 封装/外壳： | 60-TFBGA |
| 供应商设备封装： | 60-VFBGA（8x9） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页当前第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页
W947D6HB / W947D2HB
128Mb Mobile LPDDR
Notes:
1. For a burst length of two, A1-An selects the two data element block; A0 selects the first access within the block.
2. For a burst length of four, A2-An selects the four data element block; A0-A1 selects the first access within the block.
3. For a burst length of eight, A3-An selects the eight data element block; A0-A2 selects the first access within the block.
4. For the optional burst length of sixteen, A4-An selects the sixteen data element block; A0-A3 selects the first access within the
block.
5. Whenever a boundary of the block is reached within a given sequence, the following access wraps within the block.
When a READ or WRITE command is issued, a block of columns equal to the burst length is effectively selected. All accesses
for that burst take place within the block, meaning that the burst will wrap within the block if a boundary is reached.
The block is uniquely selected by A1-An when the burst length is set to two, by A2-An when the burst length is set to 4, by A3-
An when the burst length is set to 8 and A4-An when the burst length is set to 16(where An is the most
significant column
address bit for a given configuration). The remaining (least significant) address bit(s) is (are) used to select the starting location
within the block. The programmed burst length applies to both read and write bursts.
6.4 Burst Type
Accesses within a given burst may be programmed to be either sequential or interleaved; this is referred to as the
burst type and is selected via bit A3. The ordering of accesses within a burst is determined by the burst length, the
burst type and the starting column address, as shown in the previous table.
6.5 Read Latency
The READ latency is the delay between the registration of a READ command and the availability of the first piece of
output data. The latency should be set to 2 or 3 clocks.
If a READ command is registered at a clock edge n and the latency is 3 clocks, the first data element will be valid at
n + 2 tCK + tAC. If a READ command is registered at a clock edge n and the latency is 2 clocks, the first data
element will be valid at n + tCK + tAC.
6.6 Extended Mode Register Description
The Extended Mode Register controls functions beyond those controlled by the Mode Register; these additional
functions include output drive strength selection and Partial Array Self Refresh (PASR). PASR is
effective in Self
Refresh mode only.
The Extended Mode Register is programmed via the MODE REGISTER SET command (with BA1=1 and BA0=0)
and will retain the stored information until it is reprogrammed, the device is put in Deep Power Down mode, or the
device loses power.
The Extended Mode Register must be loaded when all banks are idle and no bursts are in progress, and the
controller must wait the specified time tMRD before initiating any subsequent operation. Violating either of these
requirements will result in unspecified operation.
Address bits A0-A2 specify PASR, A5-A7 the Driver Strength. A logic 0 should be programmed to all the undefined
addresses bits to ensure future compatibility.
Reserved states should not be used, as unknown operation or incompatibility with future versions may result.
Publication Release Date:Jun,17, 2011
- 15 -
Revision A01-003
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W947D6HBHX5I | 制造商:WINBOND 制造商全称:Winbond 功能描述:128Mb Mobile LPDDR |
| W947D6HBHX5I TR | 制造商:Winbond Electronics Corp 功能描述: |
| W947D6HBHX6E | 制造商:Winbond Electronics Corp 功能描述:IC LPDDR SDRAM 128MBIT 60VFBGA |
| W947D6HBHX6G | 制造商:WINBOND 制造商全称:Winbond 功能描述:128Mb Mobile LPDDR |
| W948D2FB | 制造商:WINBOND 制造商全称:Winbond 功能描述:256Mb Mobile LPDDR |
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