参数资料
| 型号： | W947D6HBHX5E |
| 厂商： | Winbond Electronics |
| 文件页数： | 38/60页 |
| 文件大小： | 0K |
| 描述： | IC LPDDR SDRAM 128MBIT 60VFBGA |
| 标准包装： | 312 |
| 格式 - 存储器： | RAM |
| 存储器类型： | 移动 LPDDR SDRAM |
| 存储容量： | 128M（8Mx16） |
| 速度： | 200MHz |
| 接口： | 并联 |
| 电源电压： | 1.7 V ~ 1.95 V |
| 工作温度： | -25°C ~ 85°C |
| 封装/外壳： | 60-TFBGA |
| 供应商设备封装： | 60-VFBGA（8x9） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页当前第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页
W947D6HB / W947D2HB
128Mb Mobile LPDDR
7.6.10 Interrupting Write to Read
Data for any Write burst may be truncated by a subsequent READ command as shown in the figure below. Note that
the only data-in pairs that are registered prior to the t WTR period are written to the internal array, and any subsequent
data-in must be masked with DM.
CK
CK
Command
WRITE
NOP
NOP
READ
NOP
NOP
NOP
Address
BA,Col b
t DQSSmax
BA,Col n
t WTR
BA,Col n
CL=3
DQS
DQ
DM
DI b
DO n
1) Dl b = Data in to column b. DO n=Data out from column n.
= Don't Care
2) An interrupted burst of 4 is shown, 2 data elements are written.
3 subsequent elements of Data In are applied in the programmed order following DI b.
3) t WTR is referenced from the positive clock edge after the last Data In pair.
4)A10 is LOW with the WRITE command (Auto Precharge is disabled)
5) The READ and WRITE commands are to the same device but not necessarily to the same bank.
7.6.11 Write to Precharge
Data for any WRITE burst may be followed by a subsequent PRECHARGE command to the same bank (provided
Auto Precharge was not activated). To follow a WRITE without truncating the WRITE burst, t WR should be met as
shown in the figure below.
7.6.12 Non-Interrupting Write to Precharge
CK
CK
Command
WRITE
NOP
NOP
NOP
NOP
PRE
Address
BA,Col b
t DQSSmax
BA,Col n
t WR
BA a (or all)
DQS
DQ
DM
1) Dl b = Data in to column b
DI b
= Don't Care
3 subsequent elements of Data In are applied in the programmed order following DI b.
2) A non-interrupted burst of 4 is shown.
3) t WR is referenced from the positive clock edge after the last Data In pair.
4) A10 is LOW with the WRITE command (Auto Precharge is disabled)
Publication Release Date:Jun,17, 2011
- 38 -
Revision A01-003
相关PDF资料 |
PDF描述 |
|---|---|
| W25Q64DWZPIG | IC FLASH SPI 64MBIT 8WSON |
| M1A3P400-FGG256I | IC FPGA 1KB FLASH 400K 256-FBGA |
| M1A3P400-FG256I | IC FPGA 1KB FLASH 400K 256-FBGA |
| EPF6024AQC208-2N | IC FLEX 6000 FPGA 24K 208-PQFP |
| EPF6024AQC208-2 | IC FLEX 6000 FPGA 24K 208-PQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W947D6HBHX5I | 制造商:WINBOND 制造商全称:Winbond 功能描述:128Mb Mobile LPDDR |
| W947D6HBHX5I TR | 制造商:Winbond Electronics Corp 功能描述: |
| W947D6HBHX6E | 制造商:Winbond Electronics Corp 功能描述:IC LPDDR SDRAM 128MBIT 60VFBGA |
| W947D6HBHX6G | 制造商:WINBOND 制造商全称:Winbond 功能描述:128Mb Mobile LPDDR |
| W948D2FB | 制造商:WINBOND 制造商全称:Winbond 功能描述:256Mb Mobile LPDDR |
发布紧急采购，3分钟左右您将得到回复。