参数资料
| 型号： | W947D6HBHX5E |
| 厂商： | Winbond Electronics |
| 文件页数： | 4/60页 |
| 文件大小： | 0K |
| 描述： | IC LPDDR SDRAM 128MBIT 60VFBGA |
| 标准包装： | 312 |
| 格式 - 存储器： | RAM |
| 存储器类型： | 移动 LPDDR SDRAM |
| 存储容量： | 128M（8Mx16） |
| 速度： | 200MHz |
| 接口： | 并联 |
| 电源电压： | 1.7 V ~ 1.95 V |
| 工作温度： | -25°C ~ 85°C |
| 封装/外壳： | 60-TFBGA |
| 供应商设备封装： | 60-VFBGA（8x9） |
| 包装： | 托盘 |
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W947D6HB / W947D2HB
128Mb Mobile LPDDR
1. GENERAL DESCRIPTION
W947D6HB / W947D2HB
is a high-speed Low Power double data rate synchronous dynamic random access
memory (LPDDR SDRAM), An access to the LPDDR SDRAM is burst oriented. Consecutive memory location in one
page can be accessed at a burst length of 2, 4, 8 and 16 when a bank and row is selected by an ACTIVE command.
Column addresses are automatically generated by the LPDDR SDRAM internal counter in burst operation. Random
column read is also possible by providing its address at each clock cycle. The multiple bank nature enables
interleaving among internal banks to hide the pre-charging time. By setting programmable Mode Registers, the
system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. The
device supports special low power functions such as Partial Array Self Refresh (PASR) and Automatic Temperature
Compensated Self Refresh (ATCSR).
2. FEATURES
VDD = 1.7~1.95V
VDDQ = 1.7~1.95V;
Data width: x16 / x32
Clock rate: 200MHz(-5),166MHz(-6),133MHz(-75)
Partial Array Self-Refresh(PASR)
Auto Temperature Compensated Self-Refresh(ATCSR)
Power Down Mode
Deep Power Down Mode (DPD Mode)
Programmable output buffer driver strength
Four internal banks for concurrent operation
Data mask (DM) for write data
CAS Latency: 2 and 3
Burst Length: 2, 4, 8 and 16
Burst Type: Sequential or Interleave
64 ms Refresh period
Interface: LVCMOS compatible
Support package:
60 balls BGA (x16)
90 balls BGA (x32)
Operating Temperature Range :
Extended (-25 ° C ~ +85 ° C)
Industrial (-40 ° C ~ +85 ° C)
Clock Stop capability during idle periods
Auto Pre-charge option for each burst access
Double data rate for data output
Differential clock inputs (CK and CK )
Bidirectional, data strobe (DQS)
Publication Release Date:Jun,17, 2011
- 4 -
Revision A01-003
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W947D6HBHX5I | 制造商:WINBOND 制造商全称:Winbond 功能描述:128Mb Mobile LPDDR |
| W947D6HBHX5I TR | 制造商:Winbond Electronics Corp 功能描述: |
| W947D6HBHX6E | 制造商:Winbond Electronics Corp 功能描述:IC LPDDR SDRAM 128MBIT 60VFBGA |
| W947D6HBHX6G | 制造商:WINBOND 制造商全称:Winbond 功能描述:128Mb Mobile LPDDR |
| W948D2FB | 制造商:WINBOND 制造商全称:Winbond 功能描述:256Mb Mobile LPDDR |
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