参数资料
型号: W989D6CBGX7E
厂商: WINBOND ELECTRONICS CORP
元件分类: DRAM
英文描述: 32M X 16 DDR DRAM, 5.4 ns, PBGA54
封装: 8 X 9 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-54
文件页数: 15/67页
文件大小: 1469K
代理商: W989D6CBGX7E
W989D6CB / W989D2CB
512Mb Mobile LPSDR
Publication Release Date: Jun, 27, 2011
- 22 -
Revision A01-004
8.3 Precharge
There are two commands which perform the Precharge operation: Bank Precharge and Precharge All. When the Bank Precharge
command is issued to the active bank, the bank is precharged and then switched to the idle state. The Bank Precharge command can
precharge one bank independently of the other bank and hold the unprecharged bank in the active state. The maximum time each bank
can be held in the active state is specified as tRAS (max). Therefore, each bank must be precharged within tRAS (max) from the Bank
Activate command.
The Precharge All command can be used to precharge all banks simultaneously. Even if banks are not in the active state, the Precharge
All command can still be issued. In this case, the Precharge operation is performed only for the active bank and the precharged bank is
then switched to the idle state.
8.3.1 Auto Precharge
Auto precharge is a feature that performs the same individual-bank PRECHARGE function described previously, without requiring an
explicit command. This is accomplished by using A10 to enable auto precharge in conjunction with a specific READ or WRITE command.
A precharge of the bank/row that is addressed with the READ or WRITE command is automatically performed upon completion of the
READ or WRITE burst.
Auto precharge ensures that the precharge is initiated at the earliest valid stage within a burst. Another command cannot be issued to
the same bank until the precharge time (tRP) is completed. This is determined as if an explicit PRECHARGE command was issued at the
earliest possible time.
Winbond SDRAM supports concurrent auto precharge; cases of concurrent auto precharge for READs and WRITEs are defined below.
8.3.2 READ with auto precharge interrupted by a READ (with or without auto precharge)
A READ to bank m will interrupt a READ on bank n following the programmed CAS latency. The precharge to bank n
begins when the READ to bank m is registered.
CLK
T0
T1
T2
T3
T4
T5
T6
T7
Command
Bank n
Bank m
Address
DQ
Internal
states
NOP
Idle
Dout
a
Bank n,
Col a
Bank m,
Col d
tRP-bank m
Precharge
tRP-bank n
READ-AP
Bank m
READ with burst of 4
Interrupt burst, precharge
READ with burst of 4
Page active
READ-AP
Bank n
CL=3 (bank n)
CL=3 (bank m)
Don’t Care
Note: 1. DQM is LOW.
Dout
a+1
Dout
d
Dout
d+1
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