参数资料
型号: W989D6CBGX7E
厂商: WINBOND ELECTRONICS CORP
元件分类: DRAM
英文描述: 32M X 16 DDR DRAM, 5.4 ns, PBGA54
封装: 8 X 9 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-54
文件页数: 53/67页
文件大小: 1469K
代理商: W989D6CBGX7E
W989D6CB / W989D2CB
512Mb Mobile LPSDR
Publication Release Date: Jun, 27, 2011
- 57 -
Revision A01-004
10.17 Auto Precharge Timing (Read Cycle)
Read
AP
0
11
10
9
8
7
6
5
4
3
2
1
Q0
Read
AP
Act
Q1
Read
AP
Act
Q1
Q2
AP
Act
Read
Act
Q0
Q3
(1) CAS Latency=2
Read
Act
AP
When the Auto precharge command is asserted, the period from Bank Activate command to
the start of internal precgarging must be at least tRAS (min).
“Dn” = Write data, and “Qn” = Read data
represents the Read with Auto precharge command.
represents the start of internal precharging.
represents the Bank Activate command.
Note:
tRP
( a ) burst length = 1
Command
( b ) burst length = 2
Command
( c ) burst length = 4
Command
( d ) burst length = 8
Command
DQ
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
tRP
Q0
Read
AP
Act
Q0
Read
AP
Act
Q1
Q0
Read
AP
Act
Q1
Q2
Q3
Read
AP
Act
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
(2) CAS Latency=3
tRP
( a ) burst length = 1
Command
( b ) burst length = 2
Command
( c ) burst length = 4
Command
( d ) burst length = 8
Command
DQ
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