参数资料
型号: XR16C2852IJTR-F
厂商: Exar Corporation
文件页数: 2/51页
文件大小: 0K
描述: IC UART FIFO 128B 44PLCC
标准包装: 500
特点: *
通道数: 2,DUART
FIFO's: 128 字节
规程: RS232,RS485
电源电压: 2.97 V ~ 5.5 V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 44-LCC(J 形引线)
供应商设备封装: 44-PLCC(16.59x16.59)
包装: 带卷 (TR)
XR16C2852
xr
2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS
REV. 2.1.1
10
FIGURE 4. TYPICAL OSCILLATOR CONNECTIONS
The on-chip oscillator is designed to use an industry standard microprocessor crystal (parallel resonant,
fundamental frequency with 10-22 pF capacitance load, ESR of 20-120 ohms and 100ppm frequency
tolerance) connected externally between the XTAL1 and XTAL2 pins (see Figure 4). Alternatively, an external
clock can be connected to the XTAL1 pin to clock the internal baud rate generator for standard or custom rates.
Typical oscillator connections are shown in Figure 4. For further reading on oscillator circuit please see
application note DAN108 on EXAR’s web site.
2.10
Programmable Baud Rate Generator
A single Baud Rate Generator (BRG) is provided for the transmitter and receiver, allowing independent TX/RX
channel control. The programmable Baud Rate Generator is capable of operating with a crystal frequency of
up to 24 MHz. However, with an external clock input on XTAL1 pin and a 2K ohms pull-up resistor on XTAL2
pin (as shown in Figure 5) it can extend its operation up to 50 MHz (3.125 Mbps serial data rate) at room
temperature and 5.0V.
FIGURE 5. EXTERNAL CLOCK CONNECTION FOR EXTENDED DATA RATE
Each UART also has their own prescaler along with the BRG. The prescaler is controlled by a software bit in
the MCR register. The MCR register bit-7 sets the prescaler to divide the input crystal or external clock by 1 or
4. The clock output of the prescaler goes to the BRG. The BRG further divides this clock by a programmable
C1
22-47 pF
C2
22-47 pF
Y1
1.8432 MHz
to
24 MHz
R1
0-120
(Optional)
R2
500Κ1Μ
XTAL1
XTAL2
2K
XTAL1
XTAL2
R1
VCC
External Clock
vcc
gnd
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