参数资料
型号: XRD98L63AIV-F
厂商: Exar Corporation
文件页数: 11/41页
文件大小: 0K
描述: IC CCD DIGITIZER 12BIT 48TQFP
标准包装: 250
位数: 12
通道数: 1
电压 - 电源,模拟: 2.7 V ~ 3.6 V
电压 - 电源,数字: 2.7 V ~ 3.6 V
封装/外壳: 48-TQFP
供应商设备封装: 48-TQFP(7x7)
包装: 托盘
19
Rev.1.01
XRD98L63
BLACK LEVEL OFFSET CALIBRATION
To get the maximum color resolution and dynamic
range, the XRD98L63 uses a digitally controlled cali-
bration circuit to correct for offset in the CCD signal as
well as offset in the CDS, PGA & ADC signal path. This
calibration is done while the CCD outputs Optical Black
(OB) pixels.
Figure 11. Hot Pixel Clipper
Figure 10. Simplified Block Diagram of
Black Level Offset Calibration Loop
CDS
12-bit
ADC
-
+
Offset Calibration
Logic
PGA
Reg
OB[7:0]
DB[11:0]
CCD
signal
Black Level
Offset Calibration
Loop
Offset
Adjust
Hot Pixel Clipper
CCD’s occasionally have hot pixels. These are defec-
tive pixels, which always output a bright level. To
ensure the Black Level is not affected by hot pixels in
the OB area, the Hot Pixel Clipper limits pixel data from
the ADC to a maximum value of 511 (1FFh). This
clipping only affects the data used by the internal
calibration logic. Data on the ADC output bus,
DB[11:0], is not clipped.
Pixel Averager
After the clipper, the logic takes an average of the
Optical Black pixels. The number of pixels to be
averaged can be selected as one of the following: 32,
64, 128, or 256. The Avg[1:0] bits in the Calibration
register are used to program the number of pixels to
average. This averaging function filters out noise and
prevents image artifacts. The calibration logic will
average OB pixels over as many lines as required to get
the programmed number of pixels to average.
In the Multiple Gain Mode, the logic keeps separate
avarages for even and odd lines.
Avg[1]
Avg[0]
# of Pixels
to Average
0
32
0
1
64
1
0
128 (default)
1
256
Table 4. Programming the Pixel Averager
ADC
D a t a
C
li
p
e
r
O
u
t
p
u
t
0
4096
2048
511
0
511
4096
In the default "Line" timing mode, OB pixels are
sampled when CAL is active at the start, or end, of
each CCD scan line. CAL can be programmed to be
active high or active low; please see the Timing section
for more details about clock polarity. Averaging will
span as many lines as needed to get the number of OB
pixels programmed by Avg[1:0]. Updates to the offset
DACs occur during the Optical Black pixel time after a
complete iteration. A complete iteration includes the
pixel clipping, averaging, calculation of the offset
difference, and calculation of the DAC update values.
After a complete iteration, the averager is reset, and
the logic waits for the number of lines programmed in
the “Wait A” & “Wait B” registers, WL[11:0], before
starting the next iteration.
Table 3. Black Level Output Control
Offset Register
ADCOutput
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Black Level (LSB)
X
0
X
0
1
.
X
1
0
254
X
1
255
相关PDF资料
PDF描述
XRT71D00IQ-F IC JITTER ATTENUATOR SGL 32TQFP
XRT71D03IV-F IC JITTER ATTENUATOR 3CH 64TQFP
XRT71D04IV IC JITTER ATTENUATOR 4CH 80TQFP
XRT8000IP-F IC WAN CLOCK E1/E1 DUAL 18PDIP
XRT8001IP-F IC WAN CLOCK E1/E1 DUAL 18PDIP
相关代理商/技术参数
参数描述
XRD98L63AIVTR-F 制造商:Exar Corporation 功能描述:AFE General Purpose 1ADC 12-Bit 3V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XRD98L63AIVTR-F
XRD98L63EVAL 功能描述:数据转换 IC 开发工具 Eval Board for XRD98L63AIV RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V
XRD98L63ZEVAL 功能描述:数据转换 IC 开发工具 Eval Board (Solder) XRD98L63AIV RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V
XRDAN27 制造商:EXAR 制造商全称:EXAR 功能描述:Compensating for Zero Order Hold Effects
XRDAN28 制造商:EXAR 制造商全称:EXAR 功能描述:Frequency Response Effects of Overampling and Averaging on A/D Output Data