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参数资料
| 型号： | ZL2106EVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 16/29页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL STEP-DOWN ZL2106 |
| 标准包装： | 1 |
| 系列： | Zilker Labs™ |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 3.3V |
| 电流 - 输出： | 6A |
| 输入电压： | 12V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 400kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ZL2106 |
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ZL2106
TABLE 8. SWITCHING FREQUENCY SELECTION
Component Selection
SYNC PIN
LOW
OPEN
HIGH
Resistor
FREQUENCY
200kHz
400kHz
1MHz
See Table 9
The ZL2106 is a synchronous buck converter with integrated
MOSFETs that uses an external inductor and capacitors to
perform the power conversion process. The proper selection of
the external components is critical for optimized performance.
To select the appropriate external components for the desired
performance goals, the power supply requirements listed in
If the user wishes to run the ZL2106 at a frequency not listed in
Table 8, the switching frequency can be set using an external
resistor, R SYNC , connected between SYNC and SGND using Table 9.
Table 10 must be defined.
TABLE 10. POWER SUPPLY REQUIREMENTS
TABLE 9. R SYNC RESISTOR VALUES
PARAMETER
RANGE
EXAMPLE VALUE
R SYNC
(k Ω )
10
11
12.1
13.3
14.7
16.2
17.8
19.6
21.5
23.7
26.1
F SW
(kHz)
200
222
242
267
296
320
364
400
421
471
533
Input Voltage (V IN )
Output Voltage (V OUT )
Output Current (I OUT )
Output Voltage Ripple (V orip )
Output Load Step (I ostep )
Output Load Step Rate
Output Deviation Due to
Load Step
Maximum PCB Temp.
Desired Efficiency
Other Considerations
4.5V to 14.0V
0.6V to 5.0V
0A to 6A
< 3% of V OUT
< I o
-
-
+120°C
-
-
12V
3.3V
4A
±1% of V OUT
±25% of I o
2.5A/μs
±3% of V OUT
+85°C
85%
Optimize for small size
28.7
571
31.6
34.8
38.3
42.2
46.4
615
667
727
889
1000
DESIGN GOAL TRADE-OFFS
The design of the buck power stage requires several compromises
among size, efficiency and cost. The inductor core loss increases
with frequency, so there is a trade-off between a small output filter
made possible by a higher switching frequency and getting better
power supply efficiency. Size can be decreased by increasing the
The switching frequency can also be set to any value between
200kHz and 1MHz using the I 2 C/SMBus interface. The available
frequencies are defined by f SW = 8MHz/N, where whole number
N is 8 ≤ N ≤ 40. See Application Note AN2033 for details.
If a value other than f SW = 8MHz/N is entered using a PMBus
command, the internal circuitry will select the valid switching
frequency value that is closest to the entered value. For example,
if 810kHz is entered, the device will select 800kHz (N=10).
Note: The switching frequency read back using the appropriate
PMBus command will differ slightly from the selected value in
switching frequency at the expense of efficiency. Cost can be
minimized by using through-hole inductors and capacitors; however
these components are physically large.
To start the design, select a frequency based on Table 11. This
frequency is a starting point and may be adjusted as the design
progresses.
TABLE 11. CIRCUIT DESIGN CONSIDERATIONS
FREQUENCY RANGE EFFICIENCY CIRCUIT SIZE
200kHz to 400kHz Highest Larger
Table 9. The difference is due to hardware quantization.
When multiple Zilker Labs devices are used together, connecting
400kHz to 800kHz
800kHz to 1MHz
Moderate
Lower
Smaller
Smallest
the SYNC pins together will force all devices to synchronize with
each other. The CFG pin of one device must set its SYNC pin as an
output and the remaining devices must have their SYNC pins set
as an input or as auto detect.
Note: Precise ramp timing mode must be disabled to use SYNC
clock auto detect.
16
INDUCTOR SELECTION
The output inductor selection process must include several
trade-offs. A high inductance value will result in a low ripple
current (I opp ), which will reduce output capacitance and produce
a low output ripple voltage, but may also compromise output
transient load performance. Therefore, a balance must be struck
FN6852.6
February 20, 2013
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