参数资料
型号: ZL2106EVAL1Z
厂商: Intersil
文件页数: 8/29页
文件大小: 0K
描述: BOARD EVAL STEP-DOWN ZL2106
标准包装: 1
系列: Zilker Labs™
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 3.3V
电流 - 输出: 6A
输入电压: 12V
稳压器拓扑结构: 降压
频率 - 开关: 400kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: ZL2106
ZL2106
Electrical Specifications V DDP = V DDS = 12V, T A = -40°C to +85°C unless otherwise noted. (Note 8) Typical values are at T A = +25°C.
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
MIN
MAX
PARAMETER
VSEN Undervoltage Threshold
VSEN Overvoltage Threshold
CONDITIONS
Factory default
Configurable via I 2 C/SMBus
Factory default
Configurable via I 2 C/SMBus
(Note 18)
0
0
TYP
85
115
(Note 18)
110
115
UNIT
% V OUT
% V OUT
% V OUT
% V OUT
VSEN Undervoltage Hysteresis
5
% V OUT
VSEN Undervoltage/Overvoltage Fault Response
Factory default
16
μs
Time
Peak Current Limit Threshold
Current Limit Set-point Accuracy
Configurable via I 2 C/SMBus
Factory default
Configurable via I 2 C/SMBus
5
0.2
±10
60
9.0
9.0
μs
A
A
% FS
(Note 10)
Current Limit Protection Delay
Factory default
5
t SW
(Note 17)
Configurable via I 2 C/SMBus
Thermal Protection Threshold (Junction Temperature) Factory default
1
125
32
t SW
(Note 17)
°C
Thermal Protection Hysteresis
Configurable via
I 2 C/SMBus
-40
15
125
°C
°C
NOTES:
8. Refer to Safe Operating Area in Figure 8 and thermal design guidelines in AN2010.
9. Does not include margin limits.
10. Percentage of Full Scale (FS) with temperature compensation applied.
11. The device requires a delay period following an enable signal and prior to ramping its output. Precise timing mode limits this delay period to approx
2ms, where in normal mode it may vary up to 4ms.
13. The devices may require up to a 4ms delay following the assertion of the enable signal (normal mode) or following the
de-assertion of the enable signal. Precise mode requires Re-Enable delay = t OFF + t FALL +10μs.
14. Switch node current should not exceed I RMS of 6A.
15. Factory default is the initial value in firmware. The value can be changed via PMBus commands.
16. Maximum duty cycle is limited by the equation MAX_DUTY(%) = [1 - (150×10 -9 × f SW )] × 100 and not to exceed 95%.
17. t SW = 1/f SW , where f SW is the switching frequency.
18. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
8
FN6852.6
February 20, 2013
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