ZL50232
Data Sheet
37
Zarlink Semiconductor Inc.
Main Control Register 1 (EC Group 1)
R/W Address: 401hex
Main Control Register 2 (EC Group 2)
R/W Address: 402hex
Main Control Register 3 (EC Group 3)
R/W Address: 403hex
Main Control Register 4 (EC Group 4)
R/W Address: 404hex
Main Control Register 5 (EC Group 5)
R/W Address: 405hex
Main Control Register 6 (EC Group 6)
R/W Address: 406hex
Main Control Register 7 (EC Group 7)
R/W Address: 407hex
Main Control Register 8 (EC Group 8)
R/W Address: 408hex
Main Control Register 9 (EC Group 9)
R/W Address: 409hex
Main Control Register 10 (EC Group 10)
R/W Address: 40Ahex
Main Control Register 11 (EC Group 11)
R/W Address: 40Bhex
Main Control Register 12 (EC Group 12)
R/W Address: 40Chex
Main Control Register 13 (EC Group 13)
R/W Address: 40Dhex
Main Control Register 14 (EC Group 14)
R/W Address: 40Ehex
Main Control Register 15 (EC Group 15)
R/W Address: 40Fhex
Power-up 00hex
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
MTDBI
MTDAI
Format
Law
PWUP
Functional Description of Register Bits
Unused
Unused Bits.
MTDBI
Mask Tone Detector B Interrupt: When high, the Tone Detector interrupt output from Echo Canceller
B is masked. The Tone Detector operates as specified in Echo Canceller B, Control Register 2.
When low, the Tone Detector B Interrupt is active.
MTDAI
Mask Tone Detector A Interrupt: When high, the Tone Detector interrupt output from Echo Canceller
A is masked. The Tone Detector operates as specified in Echo Canceller A, Control Register 2.
When low, the Tone Detector A Interrupt is active.
Format
ITU-T/Sign Mag: When high, both Echo Cancellers A and B for a given group, select ITU-T (G.711)
PCM code. When low, both Echo Cancellers A and B for a given group, select sign-magnitude PCM
code.
Law
A/
Law: When high, both Echo Cancellers A and B for a given group, select A-Law companded
PCM code. When low, both Echo Cancellers A and B for a given group, select
-Law companded
PCM code.
PWUP
Power-UP: When high, both Echo Cancellers A and B and Tone Detectors for a given group, are
active. When low, both Echo Cancellers A and B and Tone Detectors for a given group, are placed
in Power Down mode. In this mode, the corresponding PCM data are bypassed from Rin to Rout
and from Sin to Sout with two frames delay. When the PWUP bit toggles from zero to one, the
echo cancellers A and B execute their initialization routine which presets their registers, Base
Address+00hex to Base Address+3Fhex, to default Reset Value and clears the Adaptive Filter
coefficients. Two frames are necessary for the initialization routine to execute properly. Once the
initialization routine is executed, the user can set the per channel Control Registers for their specific
application.