参数资料
型号: A42MX24-3VQ100A
厂商: Electronic Theatre Controls, Inc.
英文描述: 40MX and 42MX FPGA Families
中文描述: 40MX和42MX FPGA系列
文件页数: 17/93页
文件大小: 854K
代理商: A42MX24-3VQ100A
24
Data Device Corporation
www.ddc-web.com
BU-6474X/6484X/6486X
J-07/05-0
BC MESSAGE SEQUENCE CONTROL
The Mini-ACE Mark3 BC message sequence control capability
enables a high degree of offloading of the host processor. This
includes using the various timing functions to enable
autonomous structuring of major and minor frames. In addition,
by implementing conditional jumps and subroutine calls, the
message sequence control processor greatly simplifies the
insertion of asynchronous, or "out-of-band" messages.
EXECUTE AND FLIP OPERATION
The Mini-ACE Mark3 BC's XQF, or "Execute and Flip" operation,
provides some unique capabilities. Following execution of this
unconditional instruction, if the condition code tests TRUE, the
BC will modify the value of the current XQF instruction's pointer
parameter by toggling bit 4 of the pointer. That is, if the selected
condition flag tests true, the value of the parameter will be
updated to the value = old address XOR 0010h. As a result, the
next time that this line in the instruction list is executed, the
Message Control/Status Block at the updated address (old
address XOR 0010h) will be processed, rather than the one at
the old address. The operation of the XQF instruction is illustrat-
ed in FIGURE 4.
There are multiple ways of utilizing the "execute and flip" instruc-
tion. One is to facilitate the implementation of a double buffering
data scheme for individual messages. This allows the message
sequence control processor to "ping-pong" between a pair of
data buffers for a particular message. By doing so, the host
processor can access one of the two Data Word blocks, while the
BC reads or writes the alternate Data Word block.
A second application of the "execute and flip" capability is in con-
junction with message retries. This allows the BC to not only
switch buses when retrying a failed message, but to automati-
cally switch buses permanently for all future times that the same
message is to be processed. This not only provides a high
degree of autonomy from the host CPU, but saves BC band-
width, by eliminating the need for future attempts to process
messages on an RT's failed channel.
XQF
POINTER
XX00h
(part of) BC INSTRUCTION LIST
MESSAGE
CONTROL/STATUS
BLOCK 0
DATA BLOCK 0
XX00h
MESSAGE
CONTROL/STATUS
BLOCK 1
DATA BLOCK 1
POINTER
FIGURE 4. EXECUTE and FLIP (XQF) OPERATION
相关PDF资料
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A42MX24-3VQ100B 40MX and 42MX FPGA Families
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A42MX36-2TQ100A 40MX and 42MX FPGA Families
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