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| 型号： | A42MX24-3VQ100A |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40MX and 42MX FPGA Families |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件页数： | 28/93页 |
| 文件大小： | 854K |
| 代理商： | A42MX24-3VQ100A |
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34
Data Device Corporation
www.ddc-web.com
BU-6474X/6484X/6486X
J-07/05-0
WORD MONITOR MODE
In the Word Monitor Terminal mode, the Mini-ACE Mark3 moni-
tors both 1553 buses. After the software initialization and Monitor
Start sequences, the Mini-ACE Mark3 stores all Command,
Status, and Data Words received from both buses. For each
word received from either bus, a pair of words is stored to the
Mini-ACE Mark3's shared RAM. The first word is the word
received from the 1553 bus. The second word is the Monitor
Identification (ID), or "Tag" word. The ID word contains informa-
tion relating to bus channel, word validity, and inter-word time
gaps. The data and ID words are stored in a circular buffer in the
shared RAM address space.
WORD MONITOR MEMORY MAP
A typical word monitor memory map is illustrated in TABLE 43.
TABLE 43 assumes a 64K address space for the Mini-ACE
Mark3's monitor. The Active Area Stack pointer provides the
address where the first monitored word is stored. In the example,
it is assumed that the Active Area Stack Pointer for Area A (loca-
tion 0100) is initialized to 0000. The first received data word is
stored in location 0000, the ID word for the first word is stored in
location 0001, etc.
The current Monitor address is maintained by means of a
counter register. This value may be read by the CPU by means
of the Data Stack Address Register. It is important to note that
when the counter reaches the Stack Pointer address of 0100 or
0104, the initial pointer value stored in this shared RAM location
will be overwritten by the monitored data and ID Words. When
the internal counter reaches an address of FFFF (or 0FFF, for an
Mini-ACE Mark3 with 4K RAM), the counter rolls over to 0000.
WORD MONITOR TRIGGER
In the Word Monitor mode, there is a pattern recognition trigger
and a pattern recognition interrupt. The 16-bit compare word for
Third Received 1553 Word
Received 1553 Words and Identification Word
FFFF
Stack Pointer
(Fixed Location - gets overwritten)
0100
Third Identification Word
005
Second Identification Word
0003
Second Received 1553 Word
0002
First Identification Word
0001
First Received 1553 Word
0000
FUNCTION
HEX
ADDRESS
0004
TABLE 43. TYPICAL WORD MONITOR MEMORY
MAP
both the trigger and the interrupt is stored in the Monitor Trigger
Word Register. The pattern recognition interrupt is enabled by
setting the MT Pattern Trigger bit in Interrupt Mask Register #1.
The pattern recognition trigger is enabled by setting the Trigger
Enable bit in Configuration Register #1 and selecting either the
Start-on-trigger or the Stop-on-trigger bit in Configuration
Register #1.
The Word Monitor may also be started by means of a low-to-high
transition on the EXT_TRIG input signal.
SELECTIVE MESSAGE MONITOR MODE
The Mini-ACE Mark3 Selective Message Monitor provides
monitoring of 1553 messages with filtering based on RT
address, T/R bit, and subaddress with no host processor inter-
vention. By autonomously distinguishing between 1553 com-
mand and status words, the Message Monitor determines
when messages begin and end, and stores the messages into
RAM, based on a programmable filter of RT address, T/R bit,
and subaddress.
The selective monitor may be configured as just a monitor, or as a
combined RT/Monitor. In the combined RT/Monitor mode, the
Mini-ACE Mark3 functions as an RT for one RT address (including
broadcast messages), and as a selective message monitor for the
other 30 RT addresses. The Mini-ACE Mark3 Message Monitor
contains two stacks, a command stack and a data stack, that are
independent from the RT command stack. The pointers for these
stacks are located at fixed locations in RAM.
MONITOR SELECTION FUNCTION
Following receipt of a valid command word in Selective Monitor
mode, the Mini-ACE Mark3 will reference the selective monitor
lookup table to determine if the particular command is enabled.
The address for this location in the table is determined by means
of an offset based on the RT Address, T/R bit, and Subaddress
bit 4 of the current command word, and concatenating it to the
monitor lookup table base address of 0280 (hex). The bit location
within this word is determined by subaddress bits 3-0 of the cur-
rent command word.
If the specified bit in the lookup table is logic "0", the command
is not enabled, and the Mini-ACE Mark3 will ignore this com-
mand. If this bit is logic "1", the command is enabled and the
Mini-ACE Mark3 will create an entry in the monitor command
descriptor stack (based on the monitor command stack pointer),
and store the data and status words associated with the com-
mand into sequential locations in the monitor data stack. In addi-
tion, for an RT-to-RT transfer in which the receive command is
selected, the second command word (the transmit command) is
stored in the monitor data stack.
The address definition for the Selective Monitor Lookup Table is
illustrated in TABLE 44.
相关PDF资料 |
PDF描述 |
|---|---|
| A42MX24-3VQ100B | 40MX and 42MX FPGA Families |
| A42MX36-2PQ100B | 40MX and 42MX FPGA Families |
| A42MX36-2PQ100ES | 40MX and 42MX FPGA Families |
| A42MX36-2TQ100 | 40MX and 42MX FPGA Families |
| A42MX36-2TQ100A | 40MX and 42MX FPGA Families |
相关代理商/技术参数 |
参数描述 |
|---|---|
| A42MX24-FPL84 | 功能描述:IC FPGA MX SGL CHIP 36K 84-PLCC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPLG84 | 功能描述:IC FPGA MX SGL CHIP 36K 84-PLCC RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPQ160 | 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPQ208 | 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPQG160 | 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
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