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参数资料
| 型号： | A42MX24-3VQ100A |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40MX and 42MX FPGA Families |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件页数： | 55/93页 |
| 文件大小： | 854K |
| 代理商： | A42MX24-3VQ100A |
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59
Data Device Corporation
www.ddc-web.com
BU-6474X/6484X/6486X
J-07/05-0
These two signals MUST be separated for "Transceiverless" operation.
Digital manchester biphase transmit data outputs. Connect directly to
corresponding inputs of a MIL-STD-1553 or MIL-STD-1773 (fiber
optic) transceiver.
TXDATA_IN_B
These two signals
MUST be directly
connected for normal
"Built-In" transceiver
operation.
R10
L7
TXDATA_OUT_B
P10
L8
These two signals MUST be separated for "Transceiverless" operation.
Digital manchester biphase transmit data outputs. Connect directly to
corresponding inputs of a MIL-STD-1553 or MIL-STD-1773 (fiber
optic) transceiver.
TXDATA_IN_B
These two signals
MUST be directly
connected for normal
"Built-In" transceiver
operation.
N12
M7
TXDATA_OUT_B
M12
M8
These two signals MUST be separated for "Transceiverless" operation.
Digital manchester biphase receive data inputs. Connect directly to
corresponding outputs of a MIL-STD-1553 or MIL-STD-1773 (fiber
optic) transceiver.
RXDATA_IN_B
These two signals
MUST be directly
connected for normal
"Built-In" transceiver
operation.
M13
P10
RXDATA_OUT_B
M14
P9
These two signals MUST be separated for "Transceiverless" operation.
Digital manchester biphase receive data inputs. Connect directly to
corresponding outputs of a MIL-STD-1553 or MIL-STD-1773 (fiber
optic) transceiver.
RXDATA_IN_B
These two signals
MUST be directly
connected for normal
"Built-In" transceiver
operation.
N13
R10
RXDATA_OUT_B
N14
R9
TABLE 59. MANDATORY ADDITIONAL CONNECTIONS & INTERFACE TO EXTERNAL TRANSCEIVER (CONT.)
SIGNAL NAME
FOR USE WITH EXTERNAL TRANSCEIVERS
"TRANSCEIVERLESS"
UTILIZING INTERNAL
"BUILT-IN"
TRANSCEIVERS
BU-64840B3
BU-64860B3
BU-64743B8
BU-64843B8
BU-64863B8
BALL
D15 (MSB)
D15
16-bit bi-directional data bus. This bus interfaces the host processor to the Mini-
ACE Mark3's internal registers and internal RAM. In addition, in transparent mode,
this bus allows data transfers to take place between the internal protocol/memory
management logic and up to 64K x 16 of external RAM. Most of the time, the out-
puts for D15 through D0 are in the high impedance state. They drive outward in
the buffered or transparent mode when the host CPU reads the internal RAM or
registers.
Also, in the transparent mode, D15-D0 will drive outward (towards the host) when
the protocol/management logic is accessing (either reading or writing) internal
RAM, or writing to external RAM. In the transparent mode, D15-D0 drives inward
when the CPU writes internal registers or RAM, or when the protocol/memory
management logic reads external RAM.
D14
E17
D13
E16
D12
E18
TABLE 60. DATA BUS
SIGNAL NAME
DESCRIPTION
BU-64840B3
BU-64860B3
BALL
D16
F15
E16
F18
D11
E15
D10
F16
D09
F15
D08
F18
E17
E18
F16
G18
D07
F17
D06
G18
D05
G16
D04
G17
F17
J18
H17
H18
D03
G15
D02
H18
D01
J17
D00 (LSB)
H17
G17
J17
K16
K17
BU-64743B8
BU-64843B8
BU-64863B8
BALL
BALL GRID ARRAY PACKAGE - SIGNAL DESCRIPTIONS BY FUNCTIONAL GROUPS (CONT.)
相关PDF资料 |
PDF描述 |
|---|---|
| A42MX24-3VQ100B | 40MX and 42MX FPGA Families |
| A42MX36-2PQ100B | 40MX and 42MX FPGA Families |
| A42MX36-2PQ100ES | 40MX and 42MX FPGA Families |
| A42MX36-2TQ100 | 40MX and 42MX FPGA Families |
| A42MX36-2TQ100A | 40MX and 42MX FPGA Families |
相关代理商/技术参数 |
参数描述 |
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| A42MX24-FPL84 | 功能描述:IC FPGA MX SGL CHIP 36K 84-PLCC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPLG84 | 功能描述:IC FPGA MX SGL CHIP 36K 84-PLCC RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPQ160 | 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPQ208 | 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPQG160 | 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
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