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| 型号： | A42MX24-3VQ100A |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40MX and 42MX FPGA Families |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件页数： | 29/93页 |
| 文件大小： | 854K |
| 代理商： | A42MX24-3VQ100A |
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35
Data Device Corporation
www.ddc-web.com
BU-6474X/6484X/6486X
J-07/05-0
SELECTIVE MESSAGE MONITOR MEMORY
ORGANIZATION
A typical memory map for the Mini-ACE Mark3 in the Selective
Message Monitor mode, assuming a 4K RAM space, is illustrat-
ed in TABLE 45. This mode of operation defines several fixed
locations in the RAM. These locations are allocated in a way in
which none of them overlap with the fixed RT locations. This
allows for the combined RT/Selective Message Monitor mode.
The fixed memory map consists of two Monitor Command Stack
Pointers (locations 102 and 106 hex), two Monitor Data Stack
Pointers (locations 103 and 107 hex), and a Selective Message
Monitor Lookup Table (locations 0280 through 02FF hex).
For this example, the Monitor Command Stack size is assumed
to be 1K words, and the Monitor Data Stack size is assumed to
be 2K words.
FIGURE 11 illustrates the Selective Message Monitor operation.
Upon receipt of a valid Command Word, the Mini-ACE Mark3 will
reference the Selective Monitor Lookup Table to determine if the
current command is enabled. If the current command is disabled,
the Mini-ACE Mark3 monitor will ignore (and not store) the cur-
rent message. If the command is enabled, the monitor will create
an entry in the Monitor Command Stack at the address location
referenced by the Monitor Command Stack Pointer, and an entry
in the monitor data stack starting at the location referenced by
the Monitor Data Stack Pointer.
The format of the information in the data stack depends on the for-
mat of the message that was processed. For example, for a BC-to-
RT transfer (receive command), the monitor will store the command
word in the monitor command descriptor stack, with the data words
and the receiving RT's status word stored in the monitor data stack.
Monitor Command Stack Pointer B (fixed location)
Monitor Data Stack A
0800-0FFF
Monitor Command Stack A
0400-07FF
Not Used
0300-03FF
Selective Monitor Lookup Table (fixed location)
0280-02FF
Not Used
0108-027F
Monitor Data Stack Pointer B (fixed location)
0107
Not Used
0104-0105
Monitor Data Stack Pointer A (fixed location)
0103
Monitor Command Stack Pointer A (fixed location)
0102
Not Used
0000-0101
DESCRIPTION
ADDRESS
(HEX)
0106
TABLE 45. TYPICAL SELECTIVE MESSAGE
MONITOR MEMORY MAP (shown for 4K RAM for
“Monitor only” mode)
The size of the monitor command stack is programmable, with
choices of 256, 1K, 4K, or 16K words. The monitor data stack
size is programmable with choices of 512, 1K, 2K, 4K, 8K, 16K,
32K or 64K words.
MONITOR INTERRUPTS
Selective monitor interrupts may be issued for End-of-message
and for conditions relating to the monitor command stack point-
er and monitor data stack pointer. The latter, as shown in FIG-
URE 9, include Command Stack 50% Rollover, Command Stack
100% Rollover, Data Stack 50% Rollover, and Data Stack 100%
Rollover.
The 50% rollover interrupts may be used to inform the host proces-
sor when the command stack or data stack is half full. At that time,
the host may proceed to read the received messages in the upper
half of the respective stack, while the Mini-ACE Mark3 monitor
writes messages to the lower half of the stack. Later, when the
monitor issues a 100% stack rollover interrupt, the host can pro-
ceed to read the received data from the lower half of the stack,
while the Mini-ACE Mark3 monitor continues to write received data
words to the upper half of the stack.
INTERRUPT STATUS QUEUE
Like the Mini-ACE Mark3 RT, the Selective Monitor mode
includes the capability for generating an interrupt status queue.
As illustrated in FIGURE 10, this provides a chronological histo-
ry of interrupt generating events. Besides the two Interrupt Mask
Registers, the Interrupt Status Queue provides additional filter-
ing capability, such that only valid messages and/or only invalid
messages may result in entries to the Interrupt Status Queue.
The interrupt status queue is 64 words deep, providing the capa-
bility to store entries for up to 32 monitored messages.
SUBADDRESS 4
0(LSB)
TRANSMIT / RECEIVE
1
RTAD_0
2
Logic “0”
RTAD_1
3
RTAD_2
4
RTAD_3
5
RTAD_4
6
Logic “1”
7
Logic “0”
8
Logic “1”
9
Logic “0”
10
Logic “0”
12
Logic “0”
13
Logic “0”
14
Logic “0”
15(MSB)
DESCRIPTION
BIT
11
TABLE 44. MONITOR SELECTION TABLE LOOKUP
ADDRESS
相关PDF资料 |
PDF描述 |
|---|---|
| A42MX24-3VQ100B | 40MX and 42MX FPGA Families |
| A42MX36-2PQ100B | 40MX and 42MX FPGA Families |
| A42MX36-2PQ100ES | 40MX and 42MX FPGA Families |
| A42MX36-2TQ100 | 40MX and 42MX FPGA Families |
| A42MX36-2TQ100A | 40MX and 42MX FPGA Families |
相关代理商/技术参数 |
参数描述 |
|---|---|
| A42MX24-FPL84 | 功能描述:IC FPGA MX SGL CHIP 36K 84-PLCC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPLG84 | 功能描述:IC FPGA MX SGL CHIP 36K 84-PLCC RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPQ160 | 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPQ208 | 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A42MX24-FPQG160 | 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
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