参数资料
型号: A4960KJPTR-T
厂商: Allegro Microsystems Inc
文件页数: 17/35页
文件大小: 0K
描述: IC BLDC CTLR BRUSHLESS 32LQFP
标准包装: 1
系列: *
应用: *
输出数: *
电流 - 输出: *
电压 - 负载: *
电源电压: *
工作温度: *
安装类型: 表面贴装
封装/外壳: 32-LQFP 裸露焊盘
供应商设备封装: 32-LQFP(7x7)
包装: 标准包装
其它名称: 620-1452-6
A4960
Automotive, Sensorless BLDC Controller
effective. It also ensures that the current in the phase windings
will start to decay in time to ensure that the torque produced by
the decaying phase current will not cause any rotor drag. If cor-
rectly set up, phase advance can result in greater motor efficiency.
In motors that use Hall sensors or rotary decoders this can be
achieved by a mechanical offset in the sensor position. However
this is only valid for one direction of rotation.
The A4960 overcomes this mechanical limitation by providing a
programmable electronic method of setting the phase advance in
either direction of rotation. The PA[3:0] (Config5 bits 11:8 ) set-
ting provides phase advance in electrical commutation angle from
0° to 28° in steps of 1.9°. This is equivalent to a phase advance up
to almost half of the commutation period on any one phase. The
phase advance is automatically always in relation to the motor
direction. There is no need to change the value with a direction
change.
Power Supplies
Two power supply voltages are required, one for the logic inter-
face and control, and another one for the analog and output drive
sections. The logic supply, connected to VDD, is a 5 V nominal
supply, but the TTL threshold logic inputs allow the inputs to be
driven from a 3.3 V or 5 V logic interface.
The normal operating voltage range of the A4960, where the
electrical parameters are fully defined, is 7 to 28 V. However, it
is designed to function correctly up to 50 V during load dump
conditions, and will maintain full operation down to 6 V. Below
7 V and above 28 V some parameters may exceed the limits
specified for the normal supply voltage range. The A4960 will
function correctly with a VBB supply down to 5.5 V. However,
full sensorless start-up and commutation may not be possible.
This provides a very rugged solution for use in the harsh automo-
tive environment.
The main power supply should be connected to VBB through
a reverse voltage protection circuit. Both supplies should be
decoupled with ceramic capacitors connected close to the supply
and ground terminals.
Gate Drives
The A4960 is designed to drive external, low on-resistance,
power N-channel MOSFETs. It supplies the large transient
currents necessary to quickly charge and discharge the external
MOSFET gate capacitance in order to reduce dissipation in the
MOSFET during switching. The charge current for the high-side
drives is provided by the bootstrap capacitors connected between
the Cx and Sx terminals, one for each phase. The charge and dis-
charge rate can be controlled using an external resistor in series
with the connection to the gate of the MOSFET.
Gate drive voltage regulation
The gate drives are powered by an internal regulator which limits
the supply to the drives and therefore the maximum gate voltage.
When the VBB supply is greater than approximately 16 V, the
regulator is a simple linear regulator. Below 16 V, the regulated
supply is maintained by a charge pump boost converter, which
requires a pump capacitor connected between the CP1 and CP2
pins. This capacitor must have a minimum value of 220 nF, and is
typically 470 nF.
The regulated voltage, nominally 13 V, is available on the VREG
pin. A sufficiently large storage capacitor must be connected to
this pin to provide the transient charging current to the low-side
drives and the bootstrap capacitors.
Bootstrap charge management
The A4960 monitors the individual bootstrap capacitor charge
voltages to ensure sufficient high-side drive. Before a high-side
drive can be turned on, the bootstrap capacitor voltage must be
higher than the turn-on voltage limit. If this is not the case, then
the A4960 will attempt to charge the bootstrap capacitor by acti-
vating the complementary low-side drive. Under normal circum-
stances this will charge the capacitor above the turn-on voltage in
a few microseconds and the high-side drive will then be enabled.
The bootstrap voltage monitor remains active while the high-side
drive is active, and if the voltage drops below the turn-off volt-
age, a charge cycle is initiated also.
The bootstrap charge management circuit may actively charge the
bootstrap capacitor regularly when the PWM duty cycle is very
high, particularly when the PWM off-time is too short to permit
the bootstrap capacitor to become sufficiently charged. If, for any
reason, the bootstrap capacitor cannot be sufficiently charged a
bootstrap fault will occur. See the Diagnostics section for further
details.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
16
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