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参数资料
| 型号： | A4960KJPTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 25/35页 |
| 文件大小： | 0K |
| 描述： | IC BLDC CTLR BRUSHLESS 32LQFP |
| 标准包装： | 1 |
| 系列： | * |
| 应用： | * |
| 输出数： | * |
| 电流 - 输出： | * |
| 电压 - 负载： | * |
| 电源电压： | * |
| 工作温度： | * |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP 裸露焊盘 |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 标准包装 |
| 其它名称： | 620-1452-6 |
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A4960
Automotive, Sensorless BLDC Controller
Each of the 8 configuration and control registers has a write bit,
WR (bit 12), as the first bit after the register address (bits 15:13).
This bit must be set to 1 to write the subsequent bits into the
selected register. If WR is set to 0 then the remaining data bits
(bits 11:0) are ignored.
The state of the WR bit also determines the data output on SDO.
By setting the WR bit to 1, writing to any register will allow the
Diagnostic register to be read at the SDO output. If WR is set
to 0, then the output is the contents of the register addressed by
the first three input bits. In all cases the first three bits output on
SDO will always be the FF, POR, and VR bits from the Diagnos-
tic register.
Configuration and control registers
The serial data word is 16 bits, input MSB first, with the first
three bits defined as the register address. This provides eight writ-
able registers:
? Six registers are used for configuration: one for blank time and
dead time programming, one for current and voltage limits, one
for PWM set-up parameters, and three for start-up parameters.
? The seventh register is the fault Mask register, which provides
the ability to disable individual diagnostics.
? The eighth register is the Run register, containing motor control
inputs.
Config0 Configuration register 0 contains basic timing
settings:
? CB[1:0], 2 bits to select the commutation blank time, t CB
? BT[3:0], a 4-bit integer to set the blank time, t BL , in 400 ns
increments
? DT[5:0], a 6-bit integer to set the dead time, t DEAD , in 50 ns
increments
Config1 Configuration Register 1 contains basic voltage
settings:
? VR[3:0], a 4-bit integer to set the current limit reference volt-
age, V RI , as a ratio of the voltage at the REF terminal, V REF
? VT[5:0], a 6-bit integer to set the Drain-Source Threshold Volt-
age, V DSTH , in 25 mV increments
Config2 Configuration Register 2 contains PWM settings:
PT[4:0], a 5-bit integer to set the off-time for the PWM cur-
rent control used to limit the motor current during start-up and
normal running
Config3 Configuration Register 3 contains start-up hold settings:
? IDS, to select between current control and duty cycle control to
set the initial holding torque.
? HQ[3:0], a 4-bit integer to set the holding torque for the initial
start position. The holding torque is set by an internally gener-
ated PWM duty cycle or by internal PWM current control.
??If?IDS?is?set?to?zero?then?HQ[3:0]?selects?the?hold?current?in?
increments of 6.25%.
? If IDS is set to one then HQ[3:0] selects the duty cycle in
increments of 6.25%.
? HT[3:0], a 4-bit integer to set the hold time of the initial start
position in increments of 8 ms from 2 ms.
Config4 Configuration Register 4 contains start-up timing set-
tings:
? EC[3:0], a 4-bit integer to set the end commutation time in
increments of 200 μs.
? SC[3:0], a 4-bit integer to set the start commutation time in
increments of 8 ms.
Config5 Configuration Register 5 contains start-up ramp settings:
? PA[3:0], a 4-bit integer to set the phase advance in increments
of 1.875° (electrical degrees)
? RQ[3:0], a 4-bit integer to set the torque during ramp-up. The
ramp torque is set by an internally generated PWM duty cycle
or by internal PWM current control.
? If ISD is set to zero then RQ[3:0] selects the hold current in
increments of 6.25%.
? If ISD is set to one then RQ[3:0] selects the duty cycle in
increments of 6.25%.
? RR[3:0], a 4-bit integer to set the acceleration rate during the
forced commutation ramp up. Sets the reduction in commuta-
tion time, in 200 μs steps, at each commutation change.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
24
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