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参数资料
| 型号： | A4960KJPTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 21/35页 |
| 文件大小： | 0K |
| 描述： | IC BLDC CTLR BRUSHLESS 32LQFP |
| 标准包装： | 1 |
| 系列： | * |
| 应用： | * |
| 输出数： | * |
| 电流 - 输出： | * |
| 电压 - 负载： | * |
| 电源电压： | * |
| 工作温度： | * |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP 裸露焊盘 |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 标准包装 |
| 其它名称： | 620-1452-6 |
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A4960
Automotive, Sensorless BLDC Controller
Fault Description
Note that FF does not provide the same function as the general
fault output flag output on the DIAG pin (described above). The
fault output on the DIAG pin provides an indication that certain
types of faults are present and in some cases that the outputs have
been disabled. FF provides an indication that certain types of
faults have occurred since the last Diagnostic register reset and
the respective fault bit has been set.
Fault response action
For certain fault conditions, the response of the A4960 is deter-
mined by the state of the Enable Stop on Fault bit, ESF (Run
bit 6), as shown in table 2. When a short fault or overtemperature
condition is detected, if ESF is set to 1 the A4960 disables all
the gate drive outputs and coasts the motor. For short faults, this
disabled state will be latched until RESETN goes low, a serial
interface read is completed, or a power-on reset occurs. For
undervoltage fault conditions, the outputs will always be dis-
abled, regardless of the ESF bit setting.
When ESF is set to 0, although the general fault output flag
(DIAG pin) is still activated (low), the A4960 will not disrupt
normal operation under most conditions, and will therefore not
protect the motor or the drive circuit from damage. It is impera-
tive that the application master control circuit or other external
circuit takes any necessary action when a fault occurs, to prevent
damage to components.
Fault Mask register
Certain individual diagnostics can be disabled by setting the cor-
responding bit in the Mask register. If a bit is set to 1 in the Mask
Table 2: Fault Response Actions
Disable Outputs Fault
ESF = 0 ESF = 1 Latched
No fault No No n.a.
VDD Undervoltage Yes* Yes* No
register, then the corresponding diagnostic will be completely
disabled. No fault states for the disabled diagnostic will be gener-
ated and neither the general fault output flag (DIAG pin) nor bits
in the Diagnostic register will be set.
The VDD Undervoltage and VREG Undervoltage faults can-
not be masked. V DD undervoltage detection cannot be disabled
because the diagnostics and the output control depend on VDD
to operate correctly. V REG undervoltage detection cannot be
disabled because it is safe to turn on the gate drive outputs only
when V REG is at a sufficiently high voltage.
Note: Care must be taken when diagnostics are disabled to avoid
potentially damaging conditions.
Chip-level diagnostics
Parameters critical for safe operation of the A4960 and the
external MOSFETs are monitored. These include: maximum
chip temperature, minimum logic supply voltage, and the vari-
ous minimum voltages required to drive the external MOSFETs
(V REG and each of the bootstrap voltages). Note that the main
supply voltage, V BB , is not monitored for minimum voltage. This
is because the critical minimum voltages are generated by the
charge pumps internal to the A4960. When a fault is present, the
general fault output flag (DIAG pin) will be active (low).
Chip Fault States: Temperature Thresholds
Two temperature threshold actions are provided: a high tempera-
ture warning and an overtemperature shutdown.
? If the chip temperature rises above the Temperature Warning
Threshold, T JW , the general fault output flag (DIAG pin) goes
low and the High Temperature Warning bit, TW (Diagnostic
bit 11) and the common Fault flag bit, FF (bit 15), are set to 1. No
other action is taken by the A4960. When the temperature drops
below T JW by more than the hysteresis value, T JWHys , the general
fault output flag (DIAG pin) goes high, but TW and FF remain
set in the Diagnostic register until a register reset.
VREG Undervoltage
Bootstrap Undervoltage
Temperature Warning
Overtemperature
Short to Ground
Short to Supply
Shorted Load
* All gate drives low, all MOSFETs off
Yes*
Yes*
No
No
No
No
No
Yes*
Yes*
No
Yes*
Yes*
Yes*
Yes*
No
Yes
No
No
Only
when
ESF = 1
? If the chip temperature rises above the Overtemperature Thresh-
old, T JF , the general fault output flag (DIAG pin) goes low and
the overtemperature bit, TS (Diagnostic bit 10) and the common
Fault flag bit, FF (bit 15), are set to 1. When ESF (Run bit 6) is
set to 1, if an overtemperature is detected, all gate drive outputs
will be disabled automatically. If an overtemperature condition
occurs when ESF is set to 0, then no circuitry will be disabled
and action must be taken by the user to limit the power dissipa-
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
20
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相关代理商/技术参数 |
参数描述 |
|---|---|
| A4960SJPTR-T | 制造商:Allegro MicroSystems LLC 功能描述: |
| A496-2 | 制造商:APEM 功能描述:Switch Access Push Button Switch Round Cap |
| A4962KLPTR-T | 功能描述:IC MOTOR CONTROLLER 制造商:allegro microsystems, llc 系列:* 零件状态:有效 标准包装:4,000 |
| A496-3 | 制造商:APEM 功能描述: |
| A4963GLPTR-T | 功能描述:Motor Driver Power MOSFET SPI 20-TSSOP-EP 制造商:allegro microsystems, llc 系列:- 包装:剪切带（CT） 零件状态:有效 电机类型 - 步进:- 电机类型 - AC，DC:无刷 DC（BLDC） 功能:控制器 - 换向，方向管理 输出配置:前置驱动器 - 半桥（3） 接口:SPI 技术:功率 MOSFET 步进分辨率:- 应用:通用 电流 - 输出:- 电压 - 电源:4.2 V ~ 50 V 电压 - 负载:- 工作温度:-25°C ~ 150°C（TA） 安装类型:表面贴装 封装/外壳:20-TSSOP（0.173"，4.40mm 宽）裸焊盘 供应商器件封装:20-TSSOP-EP 标准包装:1 |
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