参数资料
型号: A4960KJPTR-T
厂商: Allegro Microsystems Inc
文件页数: 23/35页
文件大小: 0K
描述: IC BLDC CTLR BRUSHLESS 32LQFP
标准包装: 1
系列: *
应用: *
输出数: *
电流 - 输出: *
电压 - 负载: *
电源电压: *
工作温度: *
安装类型: 表面贴装
封装/外壳: 32-LQFP 裸露焊盘
供应商设备封装: 32-LQFP(7x7)
包装: 标准包装
其它名称: 620-1452-6
A4960
Automotive, Sensorless BLDC Controller
bridge supply avoids adding any high-side current sense voltage
to the real high-side drain-source voltage.
The VBRG terminal is a low-current sense input to the top of
the external MOSFET bridge. It should be connected directly to
the common connection point for the drains of the power bridge
MOSFETs at the positive supply connection point. The input
current to the VBRG terminal is proportional to the drain-source
threshold voltage, V DSTH , and is approximately:
I VBRG = 72 × V VBRG + 52 (7)
where I VBRG is the current into the VBRG terminal in μA and
V DSTH is the Drain-Source Threshold Voltage, described above.
Note that the VBRG terminal can withstand a negative voltage
as great as –5 V. This allows the terminal to remain connected
directly to the top of the power bridge during negative transients
where the body diodes of the power MOSFETs are used to clamp
the negative transient. The same applies to the more extreme case
where the MOSFET body diodes are used to clamp a reverse bat-
tery connection.
MOSFET fault blank time
To avoid false MOSFET fault detection during switching tran-
sients the V DS -to-V DSTH comparison is delayed, following a
MOSFET turn-on, by the internal blank timer. This is the same
blank time as used for current sensing phase voltage monitoring.
The length of the blanking time is set by the contents of BT[3:0]
(Config0 bits 9:6 ). These four bits contain a positive integer that
determines the blank time derived by division from the system
clock.
The blank time is defined as in equation 5:
t BL = n × 400 ns
where n is a positive integer defined by BT[3:0].
For example, when BT[3:0] contains 1001 (9 in decimal), then
t BL = 3.6 μs typically.
The accuracy of t BL is determined by the accuracy of the system
clock, t OSC , as defined in the Electrical Characteristics table.
Short fault operation
Power MOSFETs take a finite time to reach the rated on-resis-
tance, so the measured drain-source voltages may show a fault as
the phase switches. To overcome this and avoid false short fault
detection, the voltages are not sampled until a blank time elapses
after the external MOSFET is turned on. If the drain-source volt-
age remains above the threshold after the blank time, then a short
fault will be detected. If ESF (Run bit 6) is set to 1 this fault will
be latched and the MOSFET disabled until there is an A4960
Diagnostic register reset.
If a short circuit fault occurs when ESF is set to 0, then the
external MOSFETs are not disabled by the A4960. To limit any
damage to the external MOSFETs or the motor, the A4960 should
either be fully disabled by the RESETN input or all MOSFETs
switched off by setting RUN (bit 0 in the Run register) to 0,
through a serial interface write. Alternatively, setting the ESF bit
to 1will allow the A4960 to disable the MOSFETs as soon as a
fault is detected.
MOSFET Fault State: Short to Supply
A short from any of the motor phase connections to the battery
or VBB connection is detected by monitoring the voltage across
the low-side MOSFETs in each phase using the respective Sx
terminal and the LSS terminal. This drain-source voltage is then
compared to the Drain-Source Threshold Voltage, V DSTH , after
a blank time. While the drain source voltage exceeds V DSTH , the
general fault output flag (DIAG pin) will be low and, when ESF
is set to 1, it will be latched low and the outputs will be disabled.
MOSFET Fault State: Short to Ground
A short from any of the motor phase connections to ground
is detected by monitoring the voltage across the high-side
MOSFETs in each phase using the respective Sx terminal and the
voltage at VBRG. This drain-source voltage is then compared to
the Drain-Source Threshold Voltage, V DSTH , after a blank time.
While the drain source voltage exceeds V DSTH the general fault
output flag on the DIAG pin will be low and, when ESF is set to
1, it will be latched low and the outputs will be disabled.
Note: The distinction between short to ground and short to supply
can only be made by examining the serial Diagnostic register.
The general fault output flag (DIAG pin) simply indicates the
presence of a probable short circuit.
MOSFET Fault State: Shorted Winding
The short to ground and short to supply detection circuits will
also detect a short across a motor phase winding. In most cases
a shorted winding will be indicated by a high-side and low-side
fault latched at the same time in the Diagnostic register. In some
cases the relative impedances may only permit one of the shorts
to be detected. In any case when a short of any type is detected
the general fault output flag (DIAG pin) will go low and, when
ESF is set to 1, it will be latched low and the outputs will be
disabled.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
22
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