参数资料
型号: AD14060LBF-4
厂商: Analog Devices Inc
文件页数: 41/48页
文件大小: 0K
描述: IC DSP CMOS 32BIT 308CQFP
产品培训模块: SHARC Processor Overview
标准包装: 1
系列: SHARC®
类型: 浮点
接口: 主机接口,连接端口,串行端口
时钟速率: 40MHz
非易失内存: 外部
芯片上RAM: 2MB
电压 - 输入/输出: 3.30V
电压 - 核心: 3.30V
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 308-CBQFP
供应商设备封装: 308-CQFP(52x52)
包装: 托盘
AD14060/AD14060L
Rev. B | Page 46 of 48
PCB LAYOUT GUIDELINES
The drawing in Figure 40 assumes that the trim/form tooling
described previously is used. These recommendations are
provided for user convenience and are PCB layout guidelines
only, based on standard practice. PCB pad footprint geometries
and placement are illustrated.
0.015
(0.381)
1.9000 (48.26) 4 PLACES
2.060 (52.324) 4 PLACES
2.260 (57.404) 4 PLACES
0.025 (0.635) MIN
THIS IS A PC BOARD COMPONENT FOOTPRINT,
NOT THE PACKAGE OUTLINE.
0.025
(0.635)
0.025 (0.635) MIN
00667-
040
Figure 40. PC Board Component Footprint
Dimensions shown in inches and (millimeters)
Thermal Characteristics
The AD14060/AD14060L is packaged in a 308-lead ceramic
quad flatpack (CQFP). The package is optimized for thermal
conduction through the core (base of the package) down to the
mounting surface. The AD14060/AD14060L is specified for a
case temperature (TCASE). Design of the mounting surface and
attachment material should be such that TCASE is not exceeded.
θJC = 0.36°C/W
Thermal Cross-Section
The following data, together with the detailed mechanical
drawings in Figure 43, allows the designer to construct simple
thermal models for further analysis within targeted systems.
The top layer of the package, where the die are mounted, is a
metal VDD layer. The approximate metal area coverage from the
metal planes and routing layers is estimated in Table 27. The
layers are shown in Figure 41.
Table 26. Thermal Conductivity
Material
Thermal Conductivity (W/cm°C)
Ceramic
0.18
Kovar
0.14
Tungsten
1.78
Thermoplastic
0.03
Silicon
1.45
Table 27. Metal Coverage per Layer
Layer
% Metal (1 Mil Thick)
VDD
88
SIG2
16
SIG3
14
GND
91
SIG4
15
SIG5
13
BASE
95
CERAMIC LAYER 28 MILS
CERAMIC LAYER 6 MILS
CERAMIC LAYER 10 MILS
CERAMIC LAYER 4 MILS
CERAMIC LAYER 10 MILS
CERAMIC LAYER 4 MILS
CERAMIC LAYER 10 MILS
CERAMIC LAYER 4 MILS
SURFACE
KOVAR LID
0.015 MILS
KOVAR SEAL RING
HEIGHT = 50 MILS
SILICON DIE
19 MILS
THERMOPLASTIC
THICKNESS 5 MILS
VDD
SIG2
SIG3
GND
SIG4
SIG5
BASE
00667-041
Figure 41. Co-Fired Packaged Profile
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