参数资料
型号: AD9735BBCZ
厂商: Analog Devices Inc
文件页数: 41/72页
文件大小: 0K
描述: IC DAC 12BIT 1.2GSPS 160-CSPBGA
产品培训模块: Data Converter Fundamentals
DAC Architectures
标准包装: 1
位数: 12
数据接口: 并联
转换器数目: 1
电压电源: 模拟和数字
功率耗散(最大): 550mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 160-LFBGA,CSPBGA
供应商设备封装: 160-CSPBGA(12x12)
包装: 托盘
输出数目和类型: 2 电流,单极
采样率(每秒): 1.2G
AD9734/AD9735/AD9736
Rev. A | Page 46 of 72
GENERATING EXPECTED SIGNATURES
The following MATLAB code duplicates the internal logic of
the AD973x. To use it, save this code in a file called bist.m.
--- begin bist.m ---
function [ ret1 , ret2] = bist(vec)
ret1 = bist1(vec(1:2:length(vec)-1));
ret2 = bist1(vec(2:2:length(vec)));
function ret = bist1(v)
sum = zeros(1,32);
for i = 1 :length(v)
if v(i) ~= 0
su(1) = ~xor(sum(32) ,bitget(v(i),1));
su(2) = ~xor(sum(1) ,bitget(v(i),2));
su(3) = ~xor(sum(2) ,bitget(v(i),3));
su(4) = ~xor(sum(3) ,bitget(v(i),4));
su(5) = ~xor(sum(4) ,bitget(v(i),5));
su(6) = ~xor(sum(5) ,bitget(v(i),6));
su(7) = ~xor(sum(6) ,bitget(v(i),7));
su(8) = ~xor(sum(7) ,bitget(v(i),8));
su(9) = ~xor(sum(8) ,bitget(v(i),9));
su(10) = ~xor(sum(9) ,bitget(v(i),10));
su(11) = ~xor(sum(10) ,bitget(v(i),11));
su(12) = ~xor(sum(11) ,bitget(v(i),12));
su(13) = ~xor(sum(12) ,bitget(v(i),13));
su(14) = ~xor(sum(13) ,bitget(v(i),14));
su(15) = sum(14); su(16) = sum(15);
su(17) = sum(16); su(18) = sum(17);
su(19) = sum(18); su(20) = sum(19);
su(21) = sum(20); su(22) = sum(21);
su(23) = sum(22); su(24) = sum(23);
su(25) = sum(24); su(26) = sum(25);
su(27) = sum(26); su(28) = sum(27);
su(29) = sum(28); su(30) = sum(29);
su(31) = sum(30); su(32) = sum(31);
sum = su;
end
end % for ret = dec2hex( 2.^[0:31]× sum',8);
--- end bist.m ---
To generate the expected BIST signatures, follow this procedure:
1.
Start MATLAB and type the following at the command
prompt:
t = round(randn(1,100) × 213/8+213) ;
[ b1 b2 ] = bist(t)
The first statement creates a random vector of 14-bit
words, with a length of 100.
2.
Set t equal to any desired vector, or take this random vector
and input it to the AD973x.
3.
Alter the command randn(1,100) to change the vector
length as desired.
4.
Type b1 at the command line to see the calculated
signature for the LVDS BIST, Phase 1.
5.
Type b2 to see the value for LVDS BIST, Phase 2.
The values returned for b1 and b2 each are 32-bit hex values.
They correspond to Reg. 18, Reg. 19, Reg. 20, and Reg. 21,
where b1 is the value read for SEL<1:0> = 0, 0 (see Table 17)
and b2 is the value read for SEL<1:0> = 0, 1.
When the DAC is in 1× mode, the signature at SYNC BIST,
Phase 1 should equal the signature at LVDS BIST, Phase 1. The
same is true for Phase 2.
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