参数资料
型号: ADE7753ARSZ
厂商: Analog Devices Inc
文件页数: 27/60页
文件大小: 0K
描述: IC ENERGY METERING 1PHASE 20SSOP
标准包装: 66
输入阻抗: 390 千欧
测量误差: 0.1%
电压 - 高输入/输出: 2.4V
电压 - 低输入/输出: 0.8V
电流 - 电源: 3mA
电源电压: 4.75 V ~ 5.25 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
供应商设备封装: 20-SSOP
包装: 管件
产品目录页面: 797 (CN2011-ZH PDF)
配用: EVAL-ADE7753ZEB-ND - BOARD EVALUATION AD7753
ADE7753
from these measurements. If the voltage rms offset register does
not have enough range, the CH2OS register can also be used.
V1
V1P
PGA1
ADC 1
HPF
24
PHASE COMPENSATION
V1N
24
LPF2
When the HPF is disabled, the phase error between Channel 1
and Channel 2 is 0 from dc to 3.5 kHz. When HPF is enabled,
Channel 1 has the phase response illustrated in Figure 58 and
Figure 59. Also shown in Figure 60 is the magnitude response of
the filter. As can be seen from the plots, the phase response is
V2
V2P
V2N
PGA2
V2
ADC 2
1
DELAY BLOCK
2.24μs/LSB
5
0 0 1 0 1 1
0
CHANNEL 2 DELAY
REDUCED BY 4.48μs
(0.1°LEAD AT 60Hz)
0Bh IN PHCAL [5.0]
V2
V1
almost 0 from 45 Hz to 1 kHz. This is all that is required in
typical energy measurement applications. However, despite
V1
0.1°
PHCAL [5:0]
--100μs TO +34μs
being internally phase compensated, the ADE7753 must work
with transducers, which could have inherent phase errors. For
60Hz
example, a phase error of 0.1° to 0.3° is not uncommon for a
current transformer (CT). These phase errors can vary from
part to part, and they must be corrected in order to perform
accurate power calculations. The errors associated with phase
mismatch are particularly noticeable at low power factors. The
ADE7753 provides a means of digitally calibrating these small
phase errors. The ADE7753 allows a small time delay or time
advance to be introduced into the signal processing chain to
compensate for small phase errors. Because the compensation is
in time, this technique should be used only for small phase
errors in the range of 0.1° to 0.5°. Correcting large phase errors
using a time shift technique can introduce significant phase
errors at higher harmonics.
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
60Hz
Figure 57. Phase Calibration
02875-0-056
FREQUENCY (Hz)
The phase calibration register (PHCAL[5:0]) is a twos comple-
ment signed single-byte register that has values ranging from
0x21 (–31d) to 0x1F (31d).
–0.1
10 2 10 3
02875-0-057
Figure 58. Combined Phase Response of the HPF and
10 4
The register is centered at 0x0D, so that writing 0x0D to the
register gives 0 delay. By changing the PHCAL register, the time
0.20
Phase Compensation (10 Hz to 1 kHz)
delay in the Channel 2 signal path can change from –102.12 μs
to +39.96 μs (CLKIN = 3.579545 MHz). One LSB is equivalent
to 2.22 μs (CLKIN/8) time delay or advance. A line frequency of
60 Hz gives a phase resolution of 0.048° at the fundamental (i.e.,
360° × 2.22 μs × 60 Hz). Figure 57 illustrates how the phase
compensation is used to remove a 0.1° phase lead in Channel 1
due to the external transducer. To cancel the lead (0.1°) in
Channel 1, a phase lead must also be introduced into Channel 2.
The resolution of the phase adjustment allows the introduction
of a phase lead in increment of 0.048°. The phase lead is achieved
by introducing a time advance into Channel 2. A time advance
of 4.48 μs is made by writing ?2 (0x0B) to the time delay block,
thus reducing the amount of time delay by 4.48 μs, or equiva-
lently, a phase lead of approximately 0.1° at line frequency of 60 Hz.
0x0B represents –2 because the register is centered with 0 at 0x0D.
Rev. C | Page 27 of 60
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
40 45 50 55 60 65 70
FREQUENCY (Hz) 02875-0-058
Figure 59. Combined Phase Response of the HPF and
Phase Compensation (40 Hz to 70 Hz)
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