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| 型号： | ADSP-TS203SABP-050 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/48页 |
| 文件大小： | 0K |
| 描述： | IC DSP FLOAT/FIXED 500MHZ 576BGA |
| 标准包装： | 1 |
| 系列： | TigerSHARC® |
| 类型： | 定点/浮点 |
| 接口： | 主机接口，连接端口，多处理器 |
| 时钟速率： | 500MHz |
| 非易失内存： | 外部 |
| 芯片上RAM： | 512kB |
| 电压 - 输入/输出： | 2.50V |
| 电压 - 核心： | 1.05V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 576-BBGA 裸露焊盘 |
| 供应商设备封装： | 576-BGA-ED（25x25） |
| 包装： | 托盘 |
| 其它名称： | ADSP-TS203SABP050 ADSP-TS203SABP050-ND |
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Rev. D
|
Page 18 of 48
|
May 2012
STRAP PIN FUNCTION DESCRIPTIONS
Some pins have alternate functions at reset. Strap options set
processor operating modes. During reset, the processor samples
the strap option pins. Strap pins have an internal pull-up or
pull-down for the default value. If a strap pin is not connected to
an overdriving external pull-up, pull-down, or logic load, the
processor samples the default value during reset. If strap pins
are connected to logic inputs, a stronger external pull-up or
pull-down may be required to ensure default value depending
on leakage and/or low level input current of the logic load. To
set a mode other than the default mode, connect the strap pin to
a sufficiently stronger external pull-up or pull-down. Table 16
lists and describes each of the processor’s strap pins.
Table 15. Pin Definitions—Power, Ground, and Reference
Signal
Type
Term
Description
VDD
Pna
VDD pins for internal logic.
VDD_A
Pna
VDD pins for analog circuits. Pay critical attention to bypassing this supply.
VDD_IO
Pna
VDD pins for I/O buffers.
VDD_DRAM
Pna
VDD pins for internal DRAM.
VREF
I
na
Reference voltage defines the trip point for all input buffers, except SCLK, RST_IN,
POR_IN, IRQ3–0, FLAG3–0, DMAR3–0, ID2–0, CONTROLIMP1–0, LxDATO3–0P/N,
LxCLKOUTP/N, LxDATI3–0P/N, LxCLKINP/N, TCK, TDI, TMS, and TRST. VREF can be
connected to a power supply or set by a voltage divider circuit as shown in Figure 4.
SCLK_VREF
I
na
System Clock Reference. Connect this pin to a reference voltage as shown in
VSS
Gna
Ground pins.
NC
—
nc
No Connect. Do not connect these pins to anything (not to any supply, signal, or
each other). These pins are reserved and must be left unconnected.
I = input; A = asynchronous; O = output; OD = open-drain output; T = three-state; P = power supply; G = ground; pd = internal pull-down
5kΩ; pu = internal pull-up 5 kΩ; pd_0 = internal pull-down 5 kΩ on processor ID = 0; pu_0 = internal pull-up 5 kΩ on processor ID = 0;
pu_od_0 = internal pull-up 500 Ω on processor ID = 0; pd_m = internal pull-down 5 kΩ on processor bus master; pu_m = internal pull-up
5 kΩ on processor bus master; pu_ad = internal pull-up 40 kΩ. For more pull-down and pull-up information, see Electrical Characteristics
Term (termination of unused pins) column symbols: epd = external pull-down approximately 5 kΩ to VSS; epu = external pull-up
approximately 5 kΩ to VDD_IO, nc = not connected; na = not applicable (always used); VDD_IO = connect directly to VDD_IO; VSS = connect
directly to VSS
Table 16. Pin Definitions—I/O Strap Pins
Signal
Type (at
Reset)
On Pin …
Description
EBOOT
I (pd_0)
BMS
EPROM Boot.
0 = boot from EPROM immediately after reset (default)
1 = idle after reset and wait for an external device to boot processor through the
external port or a link port
IRQEN
I (pd)
BM
Interrupt Enable.
0 = disable and set IRQ3–0 interrupts to edge-sensitive after reset (default)
1 = enable and set IRQ3–0 interrupts to level-sensitive immediately after reset
LINK_DWIDTH
I (pd)
TMR0E
Link Port Input Default Data Width.
0 = 1-bit (default)
1 = 4-bit
I = input; A = asynchronous; O = output; OD = open-drain output; T = three-state; P = power supply; G = ground; pd = internal pull-down
5kΩ; pu = internal pull-up 5 kΩ; pd_0 = internal pull-down 5 kΩ on processor ID = 0; pu_0 = internal pull-up 5 kΩ on processor ID = 0;
pu_od_0 = internal pull-up 500 Ω on processor ID = 0; pd_m = internal pull-down 5 kΩ on processor bus master; pu_m = internal pull-up
5 kΩ on processor bus master; pu_ad = internal pull-up 40 kΩ. For more pull-down and pull-up information, see Electrical Characteristics
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADSP-TS203SABP-05X | 制造商:Analog Devices 功能描述: |
| ADSP-TS203SABPZ050 | 功能描述:IC PROCESSOR 500MHZ 576BGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:TigerSHARC® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
| ADSP-TS203SBBPZ050 | 制造商:Analog Devices 功能描述:DSP - Bulk |
| ADSQ-1410 | 制造商:MURATA-PS 制造商全称:Murata Power Solutions Inc. 功能描述:Quad 14-Bit, 10 MSPS Sampling A/D Converter |
| ADSQ-1410-C | 制造商:MURATA-PS 制造商全称:Murata Power Solutions Inc. 功能描述:Quad 14-Bit, 10 MSPS Sampling A/D Converter |
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