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参数资料
| 型号： | ADUC7129BSTZ126-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 59/92页 |
| 文件大小： | 0K |
| 描述： | IC DAS MCU ARM7 ADC/DDS 80-LQFP |
| 产品培训模块： | ARM7 Applications & Tools Intro to ARM7 Core & Microconverters Process Control Direct Digital Synthesis Tutorial Series (1 of 7): Introduction |
| 标准包装： | 1 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心处理器： | ARM7 |
| 芯体尺寸： | 16/32-位 |
| 速度： | 41.78MHz |
| 连通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外围设备： | PLA，POR，PWM，PSM，温度传感器，WDT |
| 输入/输出数： | 38 |
| 程序存储器容量： | 126KB（63K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 8K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 数据转换器： | A/D 10x12b; D/A 1x10b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 80-LQFP |
| 包装： | 标准包装 |
| 其它名称： | ADUC7129BSTZ126-RLDKR |
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ADuC702x Series
Preliminary Technical Data
Rev. 0 | Page 62 of 92
Table 87. COMxIEN1 MMR Bit Designations
Table 88. COMxIID1 MMR Bit Designations
Bit 3:1
Status Bits
Bit 0
NINT
Priority
Definition
Clearing Operation
000
1
No Interrupt.
110
0
2
Matching Network Address.
Read COMxRX.
101
0
3
Address Transmitted, Buffer Empty.
Write data to COMxTX or read COMxIID0.
011
0
1
Receive Line Status Interrupt.
Read COMxSTA0.
010
0
2
Receive Buffer Full Interrupt.
Read COMxRX.
001
0
3
Transmit Buffer Empty Interrupt.
Write data to COMxTX or read COMxIID0.
000
0
4
Modem Status Interrupt.
Read COMxSTA1 register.
Note that to receive a network address interrupt, the slave must
ensure that Bit 0 of COMxIEN0 (enable receive buffer full
interrupt) is set to 1.
COMxADR is an 8-bit, read/write network address register that
holds the address checked for by the network addressable
UART. Upon receiving this address, the device interrupts the
processor and/or sets the appropriate status bit in COMxIID1.
Bit
Name
Description
7
ENAM
Network Address Mode Enable Bit.
Set by user to enable network address mode.
Cleared by user to disable network address mode.
6
E9BT
9-Bit Transmit Enable Bit.
Set by user to enable 9-bit transmit. ENAM must be set.
Cleared by user to disable 9-bit transmit.
5
E9BR
9-Bit Receive Enable Bit.
Set by user to enable 9-bit receive. ENAM must be set.
Cleared by user to disable 9-bit receive.
4
ENI
Network Interrupt Enable Bit.
3
E9BD
Word Length.
Set for 9-bit data. E9BT has to be cleared.
Cleared for 8-bit data.
2
ETD
Transmitter Pin Driver Enable Bit.
Set by user to enable SOUT as an output in slave mode or multimaster mode.
Cleared by user; SOUT is three-state.
1
NABP
Network Address Bit, Interrupt Polarity Bit.
0
NAB
Network Address Bit.
Set by user to transmit the slave’s address.
Cleared by user to transmit data.
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