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参数资料
型号： AFE7222IRGCT
厂商： Texas Instruments
文件页数： 21/106页
文件大小： 0K
描述： IC AFE 12BIT 65/130MSPS 64VQFN
标准包装： 1
位数： 12
通道数： 4
功率（瓦特）： 610mW
电压 - 电源，模拟： 2.85 V ~ 3.6 V
电压 - 电源，数字： 1.7 V ~ 1.9 V
封装/外壳： 64-VFQFN 裸露焊盘
供应商设备封装： 64-VQFN 裸露焊盘（9x9）
包装： 标准包装
其它名称： 296-30113-6
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TX A input
(I channel)
TX B input
(Q channel)
TX A output
TX B output
DAC_DCLKIN
DAC_CLK
%1,2,4
DAC_CLK
AFE7222
AFE7225
www.ti.com
SLOS711B – NOVEMBER 2011 – REVISED MARCH 2012
5
REGISTER DESCRIPTIONS
5.1
TRANSMIT DIGITAL SIGNAL CHAIN REGISTERS
Figure 5-1. Signal Chain
Input data is shifted into the 8-deep FIFO at the rate of DAC_DCLKIN. At its output, the FIFO hands off
the data using a divided version of the DAC_CLK (based on the interpolation factor). The rest of the signal
chain runs off DAC_CLK and its divided derivatives.
Register Name – CONFIG0 – Address 0x103, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
Tx_BYP_SRC
TX_BYP
TX_ChB_PDN_SRC
TX_CHB_PDN
TX_CHA_PDN_SRC
TX_CHA_PDN
TX_DIS
TX_DIS – Disables the digital signal chain of both channels in TX . All blocks in digital signal chain are
powered down, and the output is DAC mid-code. Note: the DACs are not powered down in this mode.
TX_CHA_PDN – Powers down digital signal chain of Channel A in Tx . Output of the channel is mid code.
Set TX_CHA_PDN_SRC for this to take effect.
TX_CHA_PDN_SRC – Setting this causes the value programmed into TX_CHA_PDN to take effect.
TX_CHB_PDN – Powers down digital signal chain of Channel B in Tx . Output of the channel is mid code.
Set TX_CHB_PDN_SRC for this to take effect.
TX_CHB_PDN_SRC – Setting this causes the value programmed into TX_CHB_PDN to take effect.
Note that when in default mode of operation (none of the register-selectable digital features enabled), all 4
of above bits (TX_CHA_PDN, TX_CHA_PDN_SRC, TX_CHB_PDN, TX_CHB_PDN_SRC) have to be set
together to '1' for them to take effect. However, if any of the digital features (like interpolation, Fine mixer,
Coarse mixer, or QMC gain/phase or offset) are enabled, then the channel A can be independently
powered down using bits TX_CHA_PDN and TX_CHA_PDN_SRC, and channel B can be independently
powered down using bits TX_CHB_PDN and TX_CHB_PDN_SRC.
TX_BYP – The inputs to both the Tx channels are directly passed to the outputs. FIFO is bypassed. Set
TX_BYP_SRC for this to take effect.
TX_BYP_SRC – Setting this causes the value programmed into TX_BYP to take effect.
Copyright 2011–2012, Texas Instruments Incorporated
REGISTER DESCRIPTIONS
21
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Product Folder Link(s): AFE7222 AFE7225
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AFE7225IRGCR 功能描述:射频前端 Dual 12B,125MSPS ADC RoHS:否 制造商:Skyworks Solutions, Inc. 类型: 工作频率:2.4 GHz, 5 GHz 最大数据速率:54 Mbps 噪声系数: 工作电源电压:3.3 V 电源电流:180 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-32
AFE7225IRGCT 功能描述:射频前端 Dual 12B,125MSPS ADC RoHS:否 制造商:Skyworks Solutions, Inc. 类型: 工作频率:2.4 GHz, 5 GHz 最大数据速率:54 Mbps 噪声系数: 工作电源电压:3.3 V 电源电流:180 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-32
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