参数资料
型号: CP2201-GM
厂商: Silicon Laboratories Inc
文件页数: 100/108页
文件大小: 0K
描述: IC ETH CTRLR SNGL-CHIP 28QFN
标准包装: 73
控制器类型: 以太网控制器,MAC/10Base-T
接口: 并行/串行
电源电压: 3.1 V ~ 3.6 V
电流 - 电源: 75mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-VFQFN 裸露焊盘
供应商设备封装: 28-QFN(5x5)
包装: 管件
产品目录页面: 627 (CN2011-ZH PDF)
配用: 336-1326-ND - KIT REF DESIGN PWR OVER ETHERNET
336-1316-ND - KIT EVAL FOR CP2201 ETH CTRLR
其它名称: 336-1313
CP2200/1
Rev. 1.0
91
Register 70. PHYCN: Physical Layer Control Register
Important Note: When using auto-negotiation, the auto-negotiation enable bit, AUTONEG (PHYCF.4), must
be set to “1” prior to
setting PHYEN, TXEN, and RXEN to 1. To restart auto-negotiation,
clear one of the three enable bits (PHYEN, TXEN, and RXEN) to “0” then set it back to “1”.
Bit 7:
PHYEN: Physical Layer Enable
0: The physical layer is placed in a low-power state with limited functionality.
1: The physical layer is placed in a normal power state and is fully functional.
Bit 6:
TXEN: Transmitter Enable
0: Physical Layer’s transmitter is placed in a low-power state. Packet transmission and Link Pulse
Generation Functions are disabled.
1. Physical layer’s transmitter is enabled.
Bit 5:
RXEN: Receiver Enable
0: Physical layer’s receiver is placed in a low-power state. Packet reception is disabled.
1: Physical layer’s receiver is enabled.
Bit 4:
DPLXMD: Full-duplex Mode Enable Bit
Note: This bit is read-only when Auto-Negotiation is enabled.
0: Half-duplex mode is selected.
1: Full-duplex mode is selected.
Bit 3:
LBMD: Loopback Mode Enable Bit
Note: Loopback mode is automatically disabled if a jabber condition is detected.
0: Loopback mode is disabled.
1: Loopback mode is enabled.
Bit 2:
LPRFAULT: Link Partner Remote Fault (Local Fault) Indicator
0: Normal operation.
1: The link partner has detected a link fault and has sent notification during auto-negotiation. This
condition can occur if the local transmitter is disabled and link pulses are no longer generated.
Bit 1:
POLREV: Polarity Reversed Indicator
0: Incorrect link polarity has not been detected.
1: Incorrect link polarity detected. Link polarity has been automatically reversed.
Bit 0:
LINKSTA: Link Status Indicator
0: Link is bad.
1: Link is good.
R/W
R/W or RO
R/W
R
Reset Value
PHYEN
TXEN
RXEN
DPLXMD
LBMD
LPRFAULT
POLREV
LINKSTA
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Address:
0x78
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