参数资料
型号: DS2154LNA2+
厂商: Maxim Integrated Products
文件页数: 99/124页
文件大小: 0K
描述: IC TXRX E1 5V 100-LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 90
类型: 收发器
驱动器/接收器数: 1/1
规程: E1
电源电压: 4.75 V ~ 5.25 V
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-LQFP(14x14)
包装: 托盘
DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
76 of 124
RHIR: RECEIVE HDLC INFORMATION REGISTER (Address = B3 Hex)
(MSB)
(LSB)
RABT
RCRCE
ROVR
RVM
REMPTY
POK
CBYTE
OBYTE
SYMBOL
POSITION
NAME AND DESCRIPTION
RABT
RHIR.7
Abort Sequence Detected. Set whenever the HDLC controller sees 7 or
more ones in a row.
RCRCE
RHIR.6
CRC Error. Set when the CRC checksum is in error.
ROVR
RHIR.5
Overrun. Set when the HDLC controller has attempted to write a byte
into an already full receive FIFO.
RVM
RHIR.4
Valid Message. Set when the HDLC controller has detected and checked
a complete HDLC packet.
REMPTY
RHIR.3
Empty. A real-time bit that is set high when the receive FIFO is empty.
POK
RHIR.2
Packet OK. Set when the byte available for reading in the receive FIFO at
RHFR is the last byte of a valid message (and hence no abort was seen, no
overrun occurred, and the CRC was correct).
CBYTE
RHIR.1
Closing Byte. Set when the byte available for reading in the receive FIFO
at RHFR is the last byte of a message (whether the message was valid or
not).
OBYTE
RHIR.0
Opening Byte. Set when the byte available for reading in the receive
FIFO at RHFR is the first byte of a message.
Note: The RABT, RCRCE, ROVR, and RVM bits are latched and are cleared when read.
RHFR: RECEIVE HDLC FIFO REGISTER (Address = B4 Hex)
(MSB)
(LSB)
HDLC7
HDLC6
HDLC5
HDLC4
HDLC3
HDLC2
HDLC1
HDLC0
SYMBOL
POSITION
NAME AND DESCRIPTION
HDLC7
RHFR.7
HDLC Data Bit 7. MSB of a HDLC packet data byte.
HDLC6
RHFR.6
HDLC Data Bit 6.
HDLC5
RHFR.5
HDLC Data Bit 5.
HDLC4
RHFR.4
HDLC Data Bit 4.
HDLC3
RHFR.3
HDLC Data Bit 3.
HDLC2
RHFR.2
HDLC Data Bit 2.
HDLC1
RHFR.1
HDLC Data Bit 1.
HDLC0
RHFR.0
HDLC Data Bit 0. LSB of a HDLC packet data byte.
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