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| 型号： | GT- 32090 |
| 厂商： | Galileo Technology Services, LLC |
| 英文描述： | Highly Integrated Single-Chip System Controller(高集成单片系统控制器) |
| 中文描述： | 高度集成的单芯片系统控制器（高集成单片系统控制器） |
| 文件页数： | 8/67页 |
| 文件大小： | 524K |
| 代理商： | GT- 32090 |
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GT-32090 System Controller For i960JX Processors
16
Galileo
Technology, Inc.
SIO Address space, Offset: 0x014
PCMCIA Address Space, Offset: 0x018
Internal Address Space Decode & Control, Offset: 0x01c
Bits
Field Name
Function
Initial Value
4:0
Decode
The SIO banks will be accessed when AD bits 31:27
match the value programmed in bits 4:0.
0x10
Bits
Field Name
Function
Initial Value
3:0
Decode
The PCMCIA cards will be accessed when AD bits
31:28 match the value programmed in bits 3:0.
0xa
Bits
Field Name
Function
Initial Value
5:0
Decode
Registers inside the GT-32090 will be accessed when
AD bits 31:26 match the value programmed in bits
5:0.
{DMAAck[2:0]*,0,1,1}
* Bits [5:3] are sampled
during reset from
DMAAck[2:0]*.
7:6
Reserved
8
Endian
The endianess of the AD Bus. This bit is used for
reads and writes to internal registers in order to inter-
pret correctly the data on the CPU bus upon access to
the GT-32090.
0 - Little endian
1 - Big endian
0x0
9
HoldMask
Masks all requests (i.e. internal DMA or external
agent) from generating assertion of Hold when set.
Should be set by the CPU only and can be used in
critical routines of the CPU. Enables the processor to
disable all bus and DMA requests.
0 - Enable requests
1 - Mask requests
0x1
10
ExtOwn
The External Agent can own the bus regardless of the
state of its ADBusReq signal, as long as this bit is set
to ‘1’. When set to ‘1’, the GT-32090 asserts Hold con-
tinuously. Set only by the External Agent and only
when it is master of the bus.
0 - Release the bus
1 - Own the bus
0x0
11
Reserved
Must be ‘0’
0x0
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