5
Table 1.1
Overview (cont)
Item
Specifications
Data transfer
controller (DTC)
(H8S/2138 Series)
Can be activated by internal interrupt or software
Multiple transfers or multiple types of transfer possible for one
activation source
Transfer possible in repeat mode, block transfer mode, etc.
Request can be sent to CPU for interrupt that activated DTC
16-bit free-running
timer module
(FRT: 1 channel)
One 16-bit free-running counter (also usable for external event
counting)
Two output compare outputs
Four input capture inputs (with buffer operation capability)
8-bit timer module
(2 channels: TMR0,
TMR1)
Each channel has:
One 8-bit up-counter (also usable for external event counting)
Two timer constant registers
The two channels can be connected
Timer connection and
8-bit timer (TMR)
module (2 channels:
TMRX, TMRY)
(Timer connection and
TMRX provided in
H8S/2138 Series)
Input/output and FRT, TMR1, TMRX, TMRY can be interconnected
Measurement of input signal or frequency-divided waveform pulse
width and cycle (FRT, TMR1)
Output of waveform obtained by modification of input signal edge
(FRT, TMR1)
Determination of input signal duty cycle (TMRX)
Output of waveform synchronized with input signal (FRT, TMRX,
TMRY)
Automatic generation of cyclical waveform (FRT, TMRY)
Watchdog timer
module
(WDT: 2 channels)
Watchdog timer or interval timer function selectable
Subclock operation capability (channel 1 only)
8-bit PWM timer
(PWM)
(H8S/2138 Series)
Up to 16 outputs
Pulse duty cycle settable from 0 to 100%
Resolution: 1/256
1.25 MHz maximum carrier frequency (20 MHz operation)
14-bit PWM timer
(PWMX)
Up to 2 outputs
Resolution: 1/16384
312.5 kHz maximum carrier frequency (20 MHz operation)
Serial communication
interface
(SCI: 2 channels,
SCI0 and SCI1)
Asynchronous mode or synchronous mode selectable
Multiprocessor communication function