679
Table 24.13 Flash Memory Characteristics (cont)
— Preliminary —
Conditions
(5-V version):
V
CC = 5.0 V ± 10%, VSS = 0 V, Ta = 0 to +75°C (regular specifications), Ta = 0 to
+85°C (wide-range specifications)
(Low-voltage version):V
CC = 3.0 V to 3.6 V, VSS = 0 V, Ta = 0 to +75°C
(programming/erasing operating temperature)
Item
Symbol
Min
Typ
Max
Unit
Test
Condition
Erase
Wait time after
SWE-bit setting*
1
x10
—
s
Wait time after
ESU-bit setting*
1
y
200
—
s
Wait time after
E-bit setting*
1,*6
z5
—
10
ms
Wait time after
E-bit clear*
1
α
10
—
s
Wait time after
ESU-bit clear*
1
β
10
—
s
Wait time after
EV-bit setting*
1
γ
20
—
s
Wait time after
dummy write*
1
ε
2—
—
s
Wait time after
EV-bit clear*
1
η
5—
—
s
Maximum erase
count*
1,*6,*7
N
—
120
Times
tE = 10 ms
Notes: 1. Set the times according to the program/erase algorithms.
2. Programming time per 32 bytes (Shows the total period for which the P-bit in the flash
memory control register (FLMCR1) is set. It does not include the programming
verification time.)
3. Block erase time (Shows the total period for which the E-bit in FLMCR1 is set. It does
not include the erase verification time.)
4. Maximum programming time (tP (max) = wait time after P-bit setting (z)
× maximum
programming count (N))
5. Number of times when the wait time after P-bit setting (z) = 200 s.
The number of writes should be set according to the actual set value of z to allow
programming within the maximum programming time (tP).
6. Maximum erase time (tE (max) = Wait time after E-bit setting (z)
× maximum erase
count (N))
7. Number of times when the wait time after E-bit setting (z) = 10 ms.
The number of erases should be set according to the actual set value of z to allow
erasing within the maximum erase time (tE).