620
Table 23.1 H8S/2138 Series and H8S/2134 Series Internal States in Each Mode
Function
High-
Speed
Medium-
Speed
Sleep
Module
Stop
Watch
Subactive
Subsleep
Software
Standby
Hardware
Standby
System clock
oscillator
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Halted
Subclock input
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Halted
CPU
operation
Instruc-
tions
Function-
ing
Medium-
speed
Halted
Function-
ing
Halted
Subclock
operation
Halted
Registers
Retained
Undefined
External
interrupts
NMI
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Halted
IRQ0
IRQ1
IRQ2
On-chip
supporting
module
DTC
Function-
ing
Medium-
speed
Function-
ing
Function-
ing/halted
(retained)
Halted
(retained)
Halted
(retained)
Halted
(retained)
Halted
(retained)
Halted
(reset)
operation
WDT1
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Subclock
operation
Subclock
operation
Subclock
operation
Halted
(retained)
Halted
(reset)
WDT0
Halted
TMR0, 1
Function-
ing/halted
(retained)
FRT
(retained)
Halted
TMRX, Y
(retained)
Timer
connec-
tion
IIC0
IIC1
SCI0
Function-
ing/halted
Halted
(reset)
Halted
(reset)
Halted
(reset)
Halted
(reset)
SCI1
(reset)
SCI2
PWM
PWMX
HIF
D/A
A/D
RAM
Function-
ing
Function-
ing
Function-
ing (DTC)
Function-
ing
Retained
Function-
ing
Retained
I/O
Function-
ing
Function-
ing
Function-
ing
Function-
ing
Retained
Function-
ing
Retained
High
impedance
Note: “Halted (retained)” means that internal register values are retained. The internal state is
operation suspended.
“Halted (reset)” means that internal register values and internal states are initialized.
In module stop mode, only modules for which a stop setting has been made are halted
(reset or retained).