523
17.3.4
Host Interface Pin Shutdown Function
Host interface output can be placed in the high-impedance state according to the state of the
HIFSD pin. Setting the SDE bit to 1 in the SYSCR2 register enables the HIFSD pin is slave
mode. The HIF constantly monitors the HIFSD pin, and when this pin goes low, places the host
interface output pins (HIRQ1, HIRQ11, HIRQ12, and GA20) in the high-impedance state. At the
same time, the host interface input pins (
&6, &6 or (&6, ,2:, ,25, and HA0) are disabled
(fixed at the high input state internally) regardless of the pin states, and the signals of the
multiplexed functions of these pins (input block) are similarly fixed internally. As a result, the
host interface I/O pins (HDB7 to HDB0) also go to the high-impedance state.
This state is maintained while the HIFSD pin is low, and when the HIFSD pin returns to the
high-level state, the pins are restored to their normal operation as host interface pins.
Table 17.9 shows the scope of HIF pin shutdown in slave mode.
Table 17.9 Scope of HIF Pin Shutdown in Slave Mode
Abbreviation
Port
Scope of
Shutdown in
Slave Mode
I/O
Selection Conditions
,25
P93
O
Input
Slave mode
,2:
P94
O
Input
Slave mode
&6
P95
O
Input
Slave mode
&6
P81
Input
Slave mode and CS2E = 1 and FGA20E = 0
(&6
P90
Input
Slave mode and CS2E = 1 and FGA20E = 1
HA0
P80
O
Input
Slave mode
HDB7 to
HDB0
P37 to
P30
O
I/O
Slave mode
HIRQ11
P43
Output
Slave mode and CS2E = 1 and P43DDR = 1
HIRQ1
P44
Output
Slave mode and P44DDR = 1
HIRQ12
P45
Output
Slave mode and P45DDR = 1
GA20
P81
Output
Slave mode and FGA20E = 1
HIFSD
P82
—
Input
Slave mode and SDE = 1
Notes: Slave mode: Single-chip mode and HI12E = 1
O: Pins shut down by shutdown function
The
,54/$'75* input signal is also fixed in the case of P90 shutdown, the
TMCI1/HSYNCI signal in the case of P43 shutdown, and the TMRI/CSYNCI in the
case of P45 shutdown.
: Pins shut down only when the HIF function is selected by means of a register setting
—: Pin not shut down