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| 型号： | ISP1160BD/01,118 |
| 厂商： | ST-ERICSSON |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封装： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件页数： | 30/88页 |
| 文件大小： | 394K |
| 代理商： | ISP1160BD/01,118 |
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Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 05 — 24 December 2004
36 of 88
9397 750 13963
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Wake-up by pin CS_N (software wake-up): During the USBSuspend state, an
external microprocessor issues a chip select signal through pin CS_N to the
ISP1160. This method of access to the ISP1160 internal registers is a software
wake-up.
Wake-up by USB devices: For the USB bus resume, a USB device attached to the
root hub port issues a resume signal to the HC through the USB bus, switching the
HC from the USBSuspend state to the USBResume state. This will also set
bit ResumeDetected of the HcInterruptStatus register (03H to read, 83H to write).
No matter which method is used to wake up the HC from the USBSuspend state, the
corresponding interrupt bits must be enabled before the HC goes into the
USBSuspend state so that the microprocessor can receive the correct interrupt
request to wake up the HC.
10. HC registers
The HC contains a set of on-chip control registers. These registers can be read or
written by the Host Controller Driver (HCD). The Control and Status register sets,
Frame Counter register sets, and Root Hub register sets are grouped under the
category of HC Operational registers (32 bits). These operational registers are made
compatible to OpenHCI (Host Controller Interface) operational registers. This allows
the OpenHCI HCD to be easily ported to the ISP1160.
Reserved bits may be dened in future releases of this specication. To ensure
interoperability, the HCD must not assume that a reserved eld contains logic 0.
Furthermore, the HCD must always preserve the values of the reserved eld. When a
R/W register is modied, the HCD must rst read the register, modify the bits desired,
and then write the register with the reserved bits still containing the original value.
Alternatively, the HCD can maintain an in-memory copy of previously written values
that can be modied and then written to the HC register. When a ‘write to set’ or ‘clear
the register’ is performed, bits written to reserved elds must be logic 0.
As shown in Table 7, the addresses (the commands for reading registers) of these
32-bit operational registers are similar to the offsets dened in the OHCI specication
with the addresses being equal to offset divided by 4.
Table 7:
HC registers summary
Address (Hex)
Register
Width Reference
Functionality
Read
Write
00
N/A
HcRevision
32
HC control and status registers
01
81
HcControl
32
02
82
HcCommandStatus
32
03
83
HcInterruptStatus
32
04
84
HcInterruptEnable
32
05
85
HcInterruptDisable
32
0D
8D
HcFmInterval
32
HC frame counter registers
0E
N/A
HcFmRemaining
32
0F
N/A
HcFmNumber
32
11
91
HcLSThreshold
32
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISP1160BD01FA | 功能描述:IC USB HOST CONTROLLER 64LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| ISP1160BD01-S | 功能描述:USB 接口集成电路 USB FULL SPEED HOST RoHS:否 制造商:Cypress Semiconductor 产品:USB 2.0 数据速率: 接口类型:SPI 工作电源电压:3.15 V to 3.45 V 工作电源电流: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:WLCSP-20 |
| ISP1160BD01-T | 功能描述:USB 接口集成电路 USB HOST CTRL FULL-SPD RoHS:否 制造商:Cypress Semiconductor 产品:USB 2.0 数据速率: 接口类型:SPI 工作电源电压:3.15 V to 3.45 V 工作电源电流: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:WLCSP-20 |
| ISP1160BD01TM | 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| ISP1160BM | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Embedded Universal Serial Bus Host Controller |
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