参数资料
型号: ISP1181ABS,551
厂商: ST-ERICSSON
元件分类: 总线控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC48
封装: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-619-2, HVQFN-48
文件页数: 1/70页
文件大小: 341K
代理商: ISP1181ABS,551
ISP1181A
Full-speed Universal Serial Bus peripheral controller
Rev. 05 — 08 December 2004
Product data
1.
General description
The ISP1181A is a Universal Serial Bus (USB) peripheral controller that complies
with
Universal Serial Bus Specication Rev. 2.0, supporting data transfer at full-speed
(12 Mbit/s). It provides full-speed USB communication capacity to microcontroller or
microprocessor-based systems. The ISP1181A communicates with the system’s
microcontroller or microprocessor through a high-speed general-purpose parallel
interface.
The ISP1181A supports fully autonomous, multi-congurable Direct Memory Access
(DMA) operation.
The modular approach to implementing a USB peripheral controller allows the
designer to select the optimum system microcontroller from the wide variety available.
The ability to reuse existing architecture and rmware investments shortens
development time, eliminates risks and reduces costs. The result is fast and efcient
development of the most cost-effective USB peripheral solution.
The ISP1181A is ideally suited for application in many personal computer peripherals
such as printers, communication devices, scanners, external mass storage (Zip
drive) devices and digital still cameras. It offers an immediate cost reduction for
applications that currently use SCSI implementations.
2.
Features
s Complies with Universal Serial Bus Specication Rev. 2.0 and most Device Class
specications
s Supports data transfer at full-speed (12 Mbit/s)
s High performance USB peripheral controller with integrated Serial Interface
Engine (SIE), FIFO memory, transceiver and 3.3 V voltage regulator
s High speed (11.1 Mbyte/s or 90 ns read/write cycle) parallel interface
s Fully autonomous and multi-conguration DMA operation
s Up to 14 programmable USB endpoints with 2 xed control IN/OUT endpoints
s Integrated physical 2462 bytes of multi-conguration FIFO memory
s Endpoints with double buffering to increase throughput and ease real-time data
transfer
s Seamless interface with most microcontrollers/microprocessors
s Bus-powered capability with low power consumption and low ‘suspend’ current
s 6 MHz crystal oscillator input with integrated PLL for low EMI
s Controllable LazyClock (100 kHz
± 50 %) output during ‘suspend’
s Software controlled connection to the USB bus (SoftConnect)
s Good USB connection indicator that blinks with trafc (GoodLink)
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参数描述
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