参数资料
型号: ISP1181ABS,551
厂商: ST-ERICSSON
元件分类: 总线控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC48
封装: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-619-2, HVQFN-48
文件页数: 11/70页
文件大小: 341K
代理商: ISP1181ABS,551
Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
Product data
Rev. 05 — 08 December 2004
19 of 70
9397 750 13959
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Short packet: Normally, the transfer byte count must be set via a control endpoint
before any DMA transfer takes place. When a short packet has been enabled as EOT
indicator (SHORTP = 1), the transfer size is determined by the presence of a short
packet in the data. This mechanism permits the use of a fully autonomous data
transfer protocol.
When reading from an OUT endpoint, reception of a short packet at an OUT token
will stop the DMA operation after transferring the data bytes of this packet.
[1]
The DMA transfer stops. However, no interrupt is generated.
10.4.2
Isochronous endpoints
A DMA transfer to/from an isochronous endpoint can be terminated by any of the
following conditions (bit names refer to the DMA Conguration Register, see
An external End-Of-Transfer signal occurs on input EOT
The DMA transfer completes as programmed in the DMA Counter register
(CNTREN = 1)
An End-Of-Packet (EOP) signal is detected
DMA operation is disabled by clearing bit DMAEN.
Table 10:
Summary of EOT conditions for a bulk endpoint
EOT condition
OUT endpoint
IN endpoint
EOT input
EOT is active
DMA Counter Register
transfer completes as
programmed in the DMA
Counter register
transfer completes as
programmed in the DMA
Counter register
Short packet
short packet is received and
transferred
counter reaches zero in the
middle of the buffer
DMAEN bit in DMA
Conguration Register
DMAEN = 0[1]
Table 11:
Recommended EOT usage for isochronous endpoints
EOT condition
OUT endpoint
IN endpoint
EOT input active
do not use
preferred
DMA Counter Register zero
do not use
preferred
End-Of-Packet
preferred
do not use
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